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runtime/compiler/p/codegen/J9TreeEvaluator.cpp

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -11716,7 +11716,6 @@ static TR::Register *inlineStringCodingHasNegativesOrCountPositives(TR::Node *no
1171611716
TR::Register *vtmp2Reg = cg->allocateRegister(TR_VRF);
1171711717

1171811718
TR::Register *storeReg = cg->allocateRegister();
11719-
TR::Register *maskReg = cg->allocateRegister();
1172011719

1172111720
TR::LabelSymbol *VSXLabel = generateLabelSymbol(cg);
1172211721
TR::LabelSymbol *serialPrepLabel = generateLabelSymbol(cg);
@@ -11817,16 +11816,20 @@ static TR::Register *inlineStringCodingHasNegativesOrCountPositives(TR::Node *no
1181711816

1181811817
// --- serialPrepLabel to deal with whatever remains
1181911818
generateLabelInstruction(cg, TR::InstOpCode::label, node, serialPrepLabel);
11820-
// do we have enough elements to use the unroll loop?
11821-
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, tempReg, lengthReg, -3);
11819+
11820+
// calculate the count for unroll loop
11821+
generateTrg1Src2Instruction(cg, TR::InstOpCode::subf, node, tempReg, indexReg, lengthReg);
11822+
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, tempReg, tempReg, 2);
11823+
generateSrc1Instruction(cg, TR::InstOpCode::mtctr, node, tempReg);
11824+
1182211825
// we need to use 4 individual masks instead for countPositves() in LE
1182311826
if (!isLE || !isCountPositives)
1182411827
{
11825-
// we want to load 0x80808080 in to maskReg, but lis was designed for signed values,
11828+
// we want to load 0x80808080 in to tempReg, but lis was designed for signed values,
1182611829
// and would throw an error for 0x8080, yet it could accept the equivalent negative value of it;
1182711830
// we don't worry about sign extension since the upper word should be 0 in storeReg after lwzx
11828-
generateTrg1ImmInstruction(cg, TR::InstOpCode::lis, node, maskReg, -32640);
11829-
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::ori, node, maskReg, maskReg, 0x8080);
11831+
generateTrg1ImmInstruction(cg, TR::InstOpCode::lis, node, tempReg, -32640);
11832+
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::ori, node, tempReg, tempReg, 0x8080);
1183011833
}
1183111834

1183211835
generateLabelInstruction(cg, TR::InstOpCode::label, node, serialUnrollLabel);
@@ -11840,26 +11843,26 @@ static TR::Register *inlineStringCodingHasNegativesOrCountPositives(TR::Node *no
1184011843
{
1184111844
if (isLE)
1184211845
{
11843-
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andi_r, node, maskReg, storeReg, 0x80);
11846+
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andi_r, node, tempReg, storeReg, 0x80);
1184411847
generateConditionalBranchInstruction(cg, TR::InstOpCode::bne, node, endLabel, cr0);
1184511848

1184611849
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, indexReg, indexReg, 1);
11847-
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andi_r, node, maskReg, storeReg, 0x8000);
11850+
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andi_r, node, tempReg, storeReg, 0x8000);
1184811851
generateConditionalBranchInstruction(cg, TR::InstOpCode::bne, node, endLabel, cr0);
1184911852

1185011853
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, indexReg, indexReg, 1);
11851-
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andis_r, node, maskReg, storeReg, 0x80);
11854+
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andis_r, node, tempReg, storeReg, 0x80);
1185211855
generateConditionalBranchInstruction(cg, TR::InstOpCode::bne, node, endLabel, cr0);
1185311856

1185411857
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, indexReg, indexReg, 1);
11855-
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andis_r, node, maskReg, storeReg, 0x8000);
11858+
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::andis_r, node, tempReg, storeReg, 0x8000);
1185611859
generateConditionalBranchInstruction(cg, TR::InstOpCode::bne, node, endLabel, cr0);
1185711860

1185811861
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, indexReg, indexReg, 1);
1185911862
}
1186011863
else
1186111864
{
11862-
generateTrg1Src2Instruction(cg, TR::InstOpCode::AND, node, storeReg, storeReg, maskReg);
11865+
generateTrg1Src2Instruction(cg, TR::InstOpCode::AND, node, storeReg, storeReg, tempReg);
1186311866
generateTrg1Src1Instruction(cg, TR::InstOpCode::cntlzw, node, storeReg, storeReg);
1186411867
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::srawi, node, storeReg, storeReg, 3);
1186511868
generateTrg1Src2Instruction(cg, TR::InstOpCode::add, node, indexReg, storeReg, indexReg);
@@ -11870,13 +11873,13 @@ static TR::Register *inlineStringCodingHasNegativesOrCountPositives(TR::Node *no
1187011873
}
1187111874
else
1187211875
{
11873-
generateTrg1Src2Instruction(cg, TR::InstOpCode::AND, node, storeReg, storeReg, maskReg);
11876+
generateTrg1Src2Instruction(cg, TR::InstOpCode::AND, node, storeReg, storeReg, tempReg);
1187411877
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::cmpi4, node, cr6, storeReg, 0);
1187511878
// this label happens to work
1187611879
generateConditionalBranchInstruction(cg, TR::InstOpCode::bne, node, matchLabel, cr6);
1187711880
generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, indexReg, indexReg, 4);
1187811881
}
11879-
generateLabelInstruction(cg, TR::InstOpCode::b, node, serialUnrollLabel);
11882+
generateConditionalBranchInstruction(cg, TR::InstOpCode::bdnz, node, serialUnrollLabel, cr6);
1188011883

1188111884
generateLabelInstruction(cg, TR::InstOpCode::label, node, serialLabel);
1188211885
generateTrg1Src2Instruction(cg, TR::InstOpCode::cmp4, node, cr6, indexReg, lengthReg);
@@ -11908,7 +11911,7 @@ static TR::Register *inlineStringCodingHasNegativesOrCountPositives(TR::Node *no
1190811911
// end
1190911912

1191011913
TR::RegisterDependencyConditions *deps =
11911-
new (cg->trHeapMemory()) TR::RegisterDependencyConditions(0, 11, cg->trMemory());
11914+
new (cg->trHeapMemory()) TR::RegisterDependencyConditions(0, 10, cg->trMemory());
1191211915

1191311916
deps->addPostCondition(startReg, TR::RealRegister::NoReg);
1191411917
deps->getPostConditions()->getRegisterDependency(deps->getAddCursorForPost() - 1)->setExcludeGPR0();
@@ -11930,7 +11933,6 @@ static TR::Register *inlineStringCodingHasNegativesOrCountPositives(TR::Node *no
1193011933
deps->addPostCondition(vtmp2Reg, TR::RealRegister::NoReg);
1193111934

1193211935
deps->addPostCondition(storeReg, TR::RealRegister::NoReg);
11933-
deps->addPostCondition(maskReg, TR::RealRegister::NoReg);
1193411936

1193511937
generateDepLabelInstruction(cg, TR::InstOpCode::label, node, endLabel, deps);
1193611938

@@ -11955,7 +11957,6 @@ static TR::Register *inlineStringCodingHasNegativesOrCountPositives(TR::Node *no
1195511957
cg->stopUsingRegister(vtmp2Reg);
1195611958

1195711959
cg->stopUsingRegister(storeReg);
11958-
cg->stopUsingRegister(maskReg);
1195911960

1196011961
for (int32_t i = 0; i < node->getNumChildren(); i++)
1196111962
{

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