From 583c07c47205dd63c534142d6f4469f0ca5eb735 Mon Sep 17 00:00:00 2001 From: Dan Petrisko Date: Wed, 19 May 2021 16:31:04 -0700 Subject: [PATCH] Update axi2mem.sv Spelling fixes --- src/axi2mem.sv | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/axi2mem.sv b/src/axi2mem.sv index 58c6441..8c298b6 100644 --- a/src/axi2mem.sv +++ b/src/axi2mem.sv @@ -57,18 +57,18 @@ module axi2mem #( logic [7:0] cnt_d, cnt_q; function automatic logic [AXI_ADDR_WIDTH-1:0] get_wrap_boundary (input logic [AXI_ADDR_WIDTH-1:0] unaligned_address, input logic [7:0] len); - logic [AXI_ADDR_WIDTH-1:0] warp_address = '0; + logic [AXI_ADDR_WIDTH-1:0] wrap_address = '0; // for wrapping transfers ax_len can only be of size 1, 3, 7 or 15 if (len == 4'b1) - warp_address[AXI_ADDR_WIDTH-1:1+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-1:1+LOG_NR_BYTES]; + wrap_address[AXI_ADDR_WIDTH-1:1+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-1:1+LOG_NR_BYTES]; else if (len == 4'b11) - warp_address[AXI_ADDR_WIDTH-1:2+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-1:2+LOG_NR_BYTES]; + wrap_address[AXI_ADDR_WIDTH-1:2+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-1:2+LOG_NR_BYTES]; else if (len == 4'b111) - warp_address[AXI_ADDR_WIDTH-1:3+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-3:2+LOG_NR_BYTES]; + wrap_address[AXI_ADDR_WIDTH-1:3+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-3:2+LOG_NR_BYTES]; else if (len == 4'b1111) - warp_address[AXI_ADDR_WIDTH-1:4+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-3:4+LOG_NR_BYTES]; + wrap_address[AXI_ADDR_WIDTH-1:4+LOG_NR_BYTES] = unaligned_address[AXI_ADDR_WIDTH-3:4+LOG_NR_BYTES]; - return warp_address; + return wrap_address; endfunction logic [AXI_ADDR_WIDTH-1:0] aligned_address; @@ -188,10 +188,10 @@ module axi2mem #( case (ax_req_q.burst) FIXED, INCR: addr_o = cons_addr; WRAP: begin - // check if the address reached warp boundary + // check if the address reached wrap boundary if (cons_addr == upper_wrap_boundary) begin addr_o = wrap_boundary; - // address warped beyond boundary + // address wrapped beyond boundary end else if (cons_addr > upper_wrap_boundary) begin addr_o = ax_req_q.addr + ((cnt_q - ax_req_q.len) << LOG_NR_BYTES); // we are still in the incremental regime @@ -231,10 +231,10 @@ module axi2mem #( FIXED, INCR: addr_o = cons_addr; WRAP: begin - // check if the address reached warp boundary + // check if the address reached wrap boundary if (cons_addr == upper_wrap_boundary) begin addr_o = wrap_boundary; - // address warped beyond boundary + // address wrapped beyond boundary end else if (cons_addr > upper_wrap_boundary) begin addr_o = ax_req_q.addr + ((cnt_q - ax_req_q.len) << LOG_NR_BYTES); // we are still in the incremental regime