diff --git a/.github/workflows/build-images.yml b/.github/workflows/build-images.yml new file mode 100644 index 00000000000000..107234fcdc2092 --- /dev/null +++ b/.github/workflows/build-images.yml @@ -0,0 +1,84 @@ +name: Build Linux kernel image and package +on: + pull_request: + types: [opened, synchronize, reopened] + push: + branches: + - qcom-sdm660-6.*.y + tags: + - v*-sdm660 +jobs: + build-linux: + runs-on: [self-hosted, Linux, aarch64] + steps: + - name: Pring debug info and do some pre-run checks + run: | + echo "GITHUB_WORKSPACE: $GITHUB_WORKSPACE" + echo "GITHUB_BASE_REF: $GITHUB_BASE_REF" + echo "GITHUB_HEAD_REF: $GITHUB_HEAD_REF" + echo "GITHUB_REF: $GITHUB_REF" + echo -n "whoami: " ; whoami + echo -n "groups: " ; groups + echo "doas permissions check:" + doas -C /etc/doas.conf apt update + - name: Update ubuntu packages + run: | + doas -n apt update + doas -n apt -y upgrade + - name: Checkout linux source from git + uses: actions/checkout@v4 + with: + clean: false + - name: Prepare build directory (.output) + run: | + mkdir -p .output + - name: Prepare linux kernel .config using sdm660_defconfig + run: | + make O=.output LOCALVERSION= defconfig sdm660_defconfig + - name: Build linux kernel (Image.gz) + run: | + make O=.output LOCALVERSION= -j$(nproc) + - name: Install modules into fake install prefix + run: | + make O=.output LOCALVERSION= INSTALL_MOD_PATH=PREFIX INSTALL_MOD_STRIP=1 modules_install + - name: Update pmbootstrap + run: git -C /opt/pmbootstrap pull + - name: Prepare pmbootstrap config + run: | + echo -n "pmbootstrap version: " + pmbootstrap --version + pmbootstrap config work /home/runner/_pmbwork + pmbootstrap config aports /home/runner/_pmbwork/cache_git/pmaports + pmbootstrap config ccache_size 20G + pmbootstrap config extra_space 256 + pmbootstrap config jobs 4 + pmbootstrap config ui console + - name: Dump pmbootstrap config + run: pmbootstrap config + - name: Update pmaports + run: | + git -C $(pmbootstrap config aports) fetch origin + git -C $(pmbootstrap config aports) reset --hard origin/master + pmbootstrap status + - name: Clean pmbootstrap chroots (pmbootstrap zap) + run: | + pmbootstrap -y zap || tail -n200 /home/runner/_pmbwork/log.txt + - name: Clean previously built kernel packages + run: | + doas rm -f /home/runner/_pmbwork/packages/edge/aarch64/linux-postmarketos-qcom-sdm660-*.apk + - name: package linux-postmarketos-qcom-sdm660 using build --envkernel + run: | + cd $GITHUB_WORKSPACE + pmbootstrap --details-to-stdout build --arch aarch64 --envkernel linux-postmarketos-qcom-sdm660 + - name: Make small rootfs image with console ui (pmbootstrap install) + run: | + pmbootstrap install --zap --no-firewall --password=147147 || tail -n200 /home/runner/_pmbwork/log.txt + - name: Cleanup pmbootstrap chroots + run: | + pmbootstrap shutdown + - uses: actions/upload-artifact@v4 + with: + name: Artifacts + compression-level: 1 + path: | + /home/runner/_pmbwork/packages/edge/aarch64/linux-postmarketos-qcom-sdm660-*.apk diff --git a/.github/workflows/check-dtschema.yml b/.github/workflows/check-dtschema.yml new file mode 100644 index 00000000000000..82c3992415ff5c --- /dev/null +++ b/.github/workflows/check-dtschema.yml @@ -0,0 +1,37 @@ +name: Device tree validation +on: + pull_request: + types: [opened, synchronize, reopened] + push: + branches: + - qcom-sdm660-6.*.y + tags: + - v*-sdm660 +jobs: + check-dbts: + runs-on: ubuntu-22.04 + steps: + - name: Checkout + uses: actions/checkout@v4 + with: + fetch-depth: 1 + - name: Install dependencies + run: | + sudo apt install -yqq bison build-essential device-tree-compiler flex gcc-aarch64-linux-gnu python3 python3-dev python3-venv swig + - name: Prepare build direcotory + run: | + mkdir build-dtbs-check + - name: Prepare config + run: | + make O=build-dtbs-check ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- defconfig sdm660_defconfig + - name: Compile DTBs + run: | + make O=build-dtbs-check ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- dtbs + - name: Check DTBs + run: | + python3 -m venv venv_dtschema + . venv_dtschema/bin/activate + pip3 install dtschema + make O=build-dtbs-check ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- CHECK_DTBS=y qcom/sdm630-*.dtb qcom/sdm636-*.dtb qcom/sdm660-*.dtb + deactivate + rm -r venv_dtschema diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index ae885414b1811e..2af8c412cfd526 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -832,6 +832,8 @@ properties: - items: - enum: - xiaomi,lavender + - xiaomi,lavender-boe + - xiaomi,lavender-tianma - const: qcom,sdm660 - items: diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml index db5acd2807ed7f..d8dac5f37c8254 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml @@ -60,6 +60,8 @@ properties: - samsung,sofef00 # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel - tdo,tl070wsh30 + # Asus Zenfone Max Pro M1 (x00td) nt36672_1080p_video_txd FHD+ IPS LCD Panel + - asus,nt36672-txd reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml new file mode 100644 index 00000000000000..d02a30c7554cd9 --- /dev/null +++ b/Documentation/devicetree/bindings/input/qcom,spmi-haptics.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2020 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/qcom,spmi-haptics.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies Inc PMI8998 spmi haptics + +maintainers: + - Caleb Connolly + +description: | + Qualcomm SPMI haptics is a peripheral on some QTI PMICs. It supports linear resonant + actuators and eccentric rotating mass type haptics commonly found in mobile devices. + It supports multiple sources of wave data such as an internal buffer, direct play + (from kernel or userspace) as well as an audio output mode. + +properties: + compatible: + items: + - enum: + - qcom,pmi8998-haptics + - qcom,pmi8996-haptics + - qcom,pmi8941-haptics + + reg: + maxItems: 1 + + interrupts: + items: + - description: short circuit interrupt + - description: play interrupt + + interrupt-names: + items: + - const: short + - const: play + + qcom,actuator-type: + description: | + The type of actuator attached to the hardware. + Allowed values are, + 0 - HAP_TYPE_LRA + 1 - HAP_TYPE_ERM + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + default: 0 + + qcom,wave-shape: + description: | + Selects the wave shape to use. + Allowed values are, + 0 - HAP_WAVE_SINE + 1 - HAP_WAVE_SQUARE + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1 ] + default: 0 + + qcom,play-mode: + description: | + Selects the play mode to use. + Allowed values are, + 0 - HAP_PLAY_DIRECT + 1 - HAP_PLAY_BUFFER + 2 - HAP_PLAY_AUDIO + 3 - HAP_PLAY_PWM + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 0, 1, 2, 3 ] + default: 2 + + qcom,wave-play-rate-us: + description: | + Wave sample durection in microseconds, 1/f where f + is the resonant frequency of the actuator. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 20475 + + qcom,brake-pattern: + minItems: 4 + maxItems: 4 + description: | + The brake pattern are the strengths of the pattern + used to brake the haptics. Allowed values are, + 0 - 0V + 1 - Vmax/4 + 2 - Vmax/2 + 3 - Vmax + $ref: /schemas/types.yaml#/definitions/uint32-array + default: [0x3, 0x3, 0x2, 0x1] + +required: + - compatible + - reg + - interrupts + - qcom,wave-play-rate-us + +additionalProperties: false + +examples: + - | + #include + #include + + spmi { + #address-cells = <1>; + #size-cells = <0>; + pmi8998_haptics: haptics@c000 { + compatible = "qcom,pmi8998-haptics"; + reg = <0xc000>; + + interrupts = <0x3 0xc0 0x0 IRQ_TYPE_EDGE_BOTH>, + <0x3 0xc0 0x1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "short", "play"; + + qcom,wave-shape = ; + qcom,play-mode = ; + qcom,brake-pattern = <0x3 0x3 0x2 0x1>; + + status = "disabled"; + }; + }; diff --git a/Documentation/devicetree/bindings/input/touchscreen/nt36xxx.yaml b/Documentation/devicetree/bindings/input/touchscreen/nt36xxx.yaml new file mode 100644 index 00000000000000..a360a9f5d43b5f --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/nt36xxx.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/touchscreen/nt36xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Novatek NT36xxx series touchscreen controller Bindings + +maintainers: + - AngeloGioacchino Del Regno + +allOf: + - $ref: touchscreen.yaml# + +properties: + compatible: + const: novatek,nt36525 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + vdd-supply: + description: Power supply regulator for VDD pin + + vio-supply: + description: Power supply regulator on VDD-IO pin + +unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + touchscreen@62 { + compatible = "novatek,nt36525"; + reg = <0x62>; + interrupt-parent = <&tlmm>; + interrupts = <45 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>; + }; + }; + +... diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5d91259ee7b53a..656bf2c1427439 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2325,6 +2325,32 @@ config CMDLINE_FORCE endchoice +config CMDLINE_DROP_DANGEROUS_ANDROID_OPTIONS + bool "Drop certain dangerous options from cmdline" + default n + help + Android >=9 primary bootloader with system-as-root feature [1] + enabled passes some arguments in kernel command line, that make + booting Linux harder: + + * skip_initramfs + * root=/dev/dm-0 + * init=/init + * dm=... + + Those parameters override default boot partition to hardcoded, + set init binary to /init, disable booting from initramfs. + + Most importantly, Linux processes root= parameter and at boot time + skips initramfs and tries to mount device that does not exist and + fails. + + If this option is enabled, those cmdline parameters will be erased + from bootloader's command line, and custom OS can boot the way it + likes. + + [1] https://source.android.com/docs/core/architecture/partitions/system-as-root + config EFI_STUB bool diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index f63abb43e9fed4..39c29d81be4bb4 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -176,14 +176,22 @@ dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm450-motorola-ali.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm630-nokia-pl2.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-voyager.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm632-fairphone-fp3.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm632-motorola-ocean.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm636-asus-x00td.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm636-sony-xperia-ganges-mermaid.dtb -dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm636-xiaomi-tulip.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-clover.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-clover-plus.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-jasmine.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender-tianma.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender-boe.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-platina.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm670-google-sargo.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb diff --git a/arch/arm64/boot/dts/qcom/pm660.dtsi b/arch/arm64/boot/dts/qcom/pm660.dtsi index 98dc04962fe340..35ae4f48f3a53e 100644 --- a/arch/arm64/boot/dts/qcom/pm660.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -190,6 +191,41 @@ interrupt-controller; #interrupt-cells = <2>; }; + + pm660_charger: charger@1000 { + compatible = "qcom,pm660-charger"; + reg = <0x1000>; + + interrupts = <0x0 0x13 0x4 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x12 0x2 IRQ_TYPE_EDGE_BOTH>, + <0x0 0x16 0x1 IRQ_TYPE_EDGE_RISING>, + <0x0 0x13 0x6 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "usb-plugin", "bat-ov", "wdog-bark", "usbin-icl-change"; + + io-channels = <&pm660_rradc 3>, + <&pm660_rradc 4>; + io-channel-names = "usbin_i", "usbin_v"; + + status = "disabled"; + }; + + pm660_fg: fuel-gauge@4000 { + compatible = "qcom,pmi8998-fg"; + reg = <0x4000 0x1000>; + + interrupts = <0x0 0x40 0x3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "soc-delta"; + + status = "disabled"; + }; + + pm660_rradc: rradc@4500 { + compatible = "qcom,pm660-rradc"; + reg = <0x4500>; + #io-channel-cells = <1>; + + status = "disabled"; + }; }; pmic@1 { @@ -198,6 +234,23 @@ #address-cells = <1>; #size-cells = <0>; + pm660_haptics: haptics@c000 { + compatible = "qcom,pmi8998-haptics", "qcom,spmi-haptics"; + reg = <0xc000>; + + interrupts = <0x1 0xc0 0x0 IRQ_TYPE_EDGE_BOTH>, + <0x1 0xc0 0x1 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "short", "play"; + + qcom,actuator-type = ; + qcom,brake-pattern = <0x3 0x3 0x0 0x0>; + qcom,play-mode = ; + qcom,wave-play-rate-us = <6667>; + qcom,wave-shape = ; + + status = "disabled"; + }; + pm660_spmi_regulators: regulators { compatible = "qcom,pm660-regulators"; }; diff --git a/arch/arm64/boot/dts/qcom/sdm630-nokia-pl2.dts b/arch/arm64/boot/dts/qcom/sdm630-nokia-pl2.dts new file mode 100644 index 00000000000000..27539976d62893 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm630-nokia-pl2.dts @@ -0,0 +1,721 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Alexander Richards + */ + +/dts-v1/; + +#include "sdm630.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" + +/ { + chassis-type = "handset"; + + model = "HMD Global Nokia 6.1"; + + // Some versions of the bootloader on this phone do weird things when + // this is not identical to downstream. However, the bootloader that + // Android 10 uses seems to accept these without any problems. + compatible = "nokia,6.1", "qcom,sdm630"; + + + qcom,msm-id = <0x13e 0x00>; + qcom,board-id = <0x08 0x00>; + qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00>; + + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <4000000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4400000>; + }; + + aliases { + }; + + chosen { + bootargs = ""; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@9D400000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x9D400000 0x0 (1080 * 1920 * 4)>; + width = <1080>; + height = <1920>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + status = "okay"; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + + regulator-always-on; + regulator-boot-on; + }; + + reserved-memory { + ranges; + #address-cells = <0x02>; + #size-cells = <0x02>; + + removed_region0@85800000 { + reg = <0x00 0x85800000 0x00 0x3700000>; + no-map; + }; + + adsp_region { + size = <0x00 0x800000>; + reusable; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + alignment = <0x00 0x400000>; + phandle = <0x10d>; + linux,phandle = <0x10d>; + }; + + dfps_data_mem@9f7ff000 { + reg = <0x00 0x9f7ff000 0x00 0x1000>; + label = "dfps_data_mem"; + }; + + pstore_region@ACB00000 { + reg = <0x00 0xacb00000 0x00 0x200000>; + compatible = "ramoops"; + record-size = <4096>; + console-size = <262144>; + ftrace-size = <4096>; + pmsg-size = <4096>; + ecc-size = <0>; + status = "okay"; + }; + + fih_mem@AC800000 { + reg = <0x00 0xac800000 0x00 0x300000>; + no-map; + }; + + fih_nv@AC000000 { + reg = <0x00 0xac000000 0x00 0x800000>; + no-map; + }; + + venus_fw_region { + size = <0x00 0x800000>; + reusable; + alloc-ranges = <0x00 0x80000000 0x00 0x20000000>; + alignment = <0x00 0x400000>; + phandle = <0x11f>; + linux,phandle = <0x11f>; + }; + + secure_region { + size = <0x00 0x5c00000>; + reusable; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + alignment = <0x00 0x400000>; + phandle = <0x135>; + linux,phandle = <0x135>; + }; + + splash_region@9d400000 { + reg = <0x00 0x9d400000 0x00 0x2300000>; + label = "cont_splash_mem"; + no-map; + }; + + linux,cma { + size = <0x00 0x2000000>; + reusable; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + alignment = <0x00 0x400000>; + linux,cma-default; + }; + + qseecom_region { + size = <0x00 0x1400000>; + reusable; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + alignment = <0x00 0x400000>; + phandle = <0x134>; + linux,phandle = <0x134>; + }; + }; + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + vol_down: vol-down { + label = "Volume Down"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + }; + }; +}; + +&blsp2_uart1 { + status = "okay"; + /* HCI Bluetooth */ + bluetooth { + compatible = "qcom,wcn3990-bt"; // common for all QCOM + vddxo-supply = <&vreg_l9a_1p8>; // downstream: vdd-core-supply + vddrf-supply = <&vreg_l6a_1p3>; // vdd-pa-supply + vddch0-supply = <&vreg_l19a_3p3>; // vdd-ldo-supply + max-speed = <3200000>; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&blsp_i2c2 { + status = "okay"; +}; + +&blsp_i2c4 { + status = "okay"; + touchscreen@38 { + compatible = "edt,edt-ft5406", "edt,edt-ft5x06"; + reg = <0x38>; + vcc-supply = <&vreg_l11a_1p8>; + pinctrl-0 = <&ts_int_active &ts_rst>; + pinctrl-names = "default"; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <1920>; + }; +}; + +&blsp_i2c7 { /* for P/L Sensor */ + status = "okay"; +}; + +&adsp_pil { + status = "okay"; + firmware-name = "adsp.mdt"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = ; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-pll-supply = <&vreg_l10a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&mdss_dsi0 { + #address-cells = <1>; + #size-cells = <0>; + vdd-supply = <&vreg_l1b_0p925>; + vdda-supply = <&vreg_l1a_1p225>; + status = "okay"; + + panel@0 { + compatible = "focaltech,ft8716u"; + reg = <0>; + + backlight = <&pm660l_wled>; + reset-gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>; + disp-te-gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_reset_gpio &panel_te_gpio>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&vreg_l1b_0p925>; + status = "okay"; +}; + +&adsp_pil { + status = "okay"; + firmware-name = "adsp.mdt"; +}; + +&lpass_smmu { + status = "okay"; +}; + +&gcc { + status = "okay"; +}; + +&gpucc { + status = "okay"; +}; + +&mmcc { + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&kgsl_smmu { + status = "okay"; +}; + +&anoc2_smmu { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&cci { + status = "okay"; +}; + +&camss { + status = "okay"; +}; + +&adreno_gpu { + status = "okay"; + zap-shader { + memory-region = <&zap_shader_region>; + firmware-name = "qcom/a508_zap.mdt"; + }; +}; + +&pm660l_wled { + status = "okay"; + default-brightness = <512>; +}; + +&pm660_charger { + status = "okay"; + monitored-battery = <&battery>; +}; + +&pm660_fg { + status = "okay"; + monitored-battery = <&battery>; + qcom,battery-capacity-ua = <4000000>; + qcom,min-voltage-uv= <3400000>; + qcom,max-voltage-uv= <4408000>; +}; + +&pm660_rradc { + status = "okay"; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-pll-supply = <&vreg_l10a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + }; + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; // TODO + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + /* SDHCI 3.3V signal doesn't seem to be supported. */ + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <350000>; + regulator-max-microvolt = <2696000>; // should be <3100000>, but we set it for lower for sdhci reasons + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l3b_3p3: l3 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l6b_3p3: l6 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <525000>; + regulator-max-microvolt = <950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1370000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + /* This gives power to the LPDDR4: never turn it off! */ + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + }; + +/* // Not present in downstream DTS, but seems to be present in many other sdm630 devices + vreg_l16a_2p7: l16 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <250>; + regulator-always-on; + }; +*/ + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l18a_1v8: l18 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <10>; + regulator-min-microamp = <200>; + regulator-max-microamp = <50000>; + regulator-system-load = <10000>; + regulator-allow-set-load; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + }; +}; + +&remoteproc_mss { + firmware-name = "mba.mbn", "modem.mdt"; + status = "okay"; +}; + +&sdhc_1 { + status = "okay"; + bus-width = <8>; + non-removable; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; + + panel_reset_gpio: panel-reset-gpio { + pins = "gpio53"; + function = "gpio"; + drive-strength = <8>; + bias-disable = <0>; + }; + + mdss_dsi_suspend: mdss-dsi-suspend { + pins = "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + panel_te_gpio: panel-te-gpio { + pins = "gpio59"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + ts_int_active: ts-int-active { + pins = "gpio67"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_rst: ts-rst { + pins = "gpio66"; + drive-strength = <8>; + bias-pull-up; + }; +}; + +&usb3 { + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + + dr_mode = "peripheral"; + extcon = <&extcon_usb>; +}; + +&sound { + status = "disabled"; + model = "sdm660"; +}; + +&venus { + status = "disabled"; + firmware-name = "qcom/venus-4.4/venus.mdt"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l5a_0p848>; + vdd-1.8-xo-supply = <&vreg_l9a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l6a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l19a_3p3>; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts index 2da83cd4118744..29511993e83308 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts @@ -8,8 +8,82 @@ #include "sdm630.dtsi" #include "sdm630-sony-xperia-nile.dtsi" +/delete-node/ &zap_shader_region; + / { model = "Sony Xperia XA2"; compatible = "sony,pioneer-row", "qcom,sdm630"; chassis-type = "handset"; + + reserved-memory { + zap_shader_region: gpu@fe49c000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xfe49c000 0x0 0xe000>; + no-map; + }; + }; +}; + +&adreno_gpu { + status = "okay"; +}; + +&gpucc { + status = "okay"; +}; + +&kgsl_smmu { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-supply = <&vreg_l1a_1p225>; + + status = "okay"; + + panel@0 { + compatible = "truly,td4322"; + reg = <0>; + + backlight = <&pm660l_wled>; + reset-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&panel_reset_gpio>; + pinctrl-names = "default"; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&vreg_l1b_0p925>; + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&pm660l_wled { + status = "okay"; + + qcom,num-strings = <2>; + qcom,current-limit-microamp = <17500>; }; diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi index a4b722e0fc1e12..0dce97a2854d3d 100644 --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi @@ -674,6 +674,20 @@ bias-disable; drive-strength = <2>; }; + + panel_reset_gpio: panel-reset-gpio-state { + pins = "gpio53"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + panel_te_gpio: panel-te-gpio-state { + pins = "gpio59"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; }; &usb3 { diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 5f6884b2367d9a..77ad1a961d2d50 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -27,6 +27,7 @@ mmc2 = &sdhc_2; }; + chosen { }; clocks { @@ -508,6 +509,12 @@ reg = <0x0 0xfed00000 0x0 0xa00000>; no-map; }; + + mdata_mem: mpss-metadata { + alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>; + size = <0x0 0x4000>; + no-map; + }; }; smem: smem { @@ -631,6 +638,9 @@ reg = <0x016c0000 0x40000>; #global-interrupts = <2>; #iommu-cells = <1>; + qcom,bypass-cbndx = /bits/ 8 <6>; + qcom,reset-nodisable-cbs = /bits/ 8 <7 8 9 10 11 12 13 14 + 15 16 17 18 19 20>; interrupts = , @@ -1057,7 +1067,7 @@ <&rpmpd SDM660_VDDMX>; power-domain-names = "cx", "mx"; - memory-region = <&mba_region>, <&mpss_region>; + memory-region = <&mba_region>, <&mpss_region>, <&mdata_mem>; status = "disabled"; @@ -1107,6 +1117,20 @@ gpu_sdm630_opp_table: opp-table { compatible = "operating-points-v2"; + + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-level = ; + opp-peak-kBps = <5184000>; + opp-supported-hw = <0xFF>; + }; + + /* + * 775MHz is only available on default speed bin + * or 0xA2 (speed bin 1). Though it cannot be used + * for now due to interconnect framework not supporting + * multiple frequencies at the same opp-level + opp-775000000 { opp-hz = /bits/ 64 <775000000>; opp-level = ; @@ -1149,6 +1173,12 @@ opp-peak-kBps = <1200000>; opp-supported-hw = <0xff>; }; + */ + }; + + zap-shader { + memory-region = <&zap_shader_region>; + firmware-name = "a508_zap.mbn"; }; }; @@ -1173,6 +1203,7 @@ "mem_iface"; #global-interrupts = <2>; #iommu-cells = <1>; + qcom,reset-nodisable-cbs = /bits/ 8 <2 3 4>; interrupts = , @@ -1210,6 +1241,8 @@ compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2"; reg = <0x05100000 0x40000>; #iommu-cells = <1>; + qcom,bypass-cbndx = /bits/ 8 <12>; + qcom,reset-nodisable-cbs = /bits/ 8 <13>; #global-interrupts = <2>; interrupts = @@ -2415,6 +2448,34 @@ redistributor-stride = <0x0 0x20000>; interrupts = ; }; + + wifi: wifi@18800000 { + compatible = "qcom,wcn3990-wifi"; + reg = <0x18800000 0x800000>; + reg-names = "membase"; + memory-region = <&wlan_msa_mem>; + clocks = <&rpmcc RPM_SMD_RF_CLK1_PIN>; + clock-names = "cxo_ref_clk_pin"; + interrupts = + , + , + , + , + , + , + , + , + , + , + , + ; + + iommus = <&anoc2_smmu 0x1a00>, + <&anoc2_smmu 0x1a01>; + qcom,snoc-host-cap-8bit-quirk; + + status = "disabled"; + }; }; sound: sound { diff --git a/arch/arm64/boot/dts/qcom/sdm636-asus-x00td.dts b/arch/arm64/boot/dts/qcom/sdm636-asus-x00td.dts new file mode 100644 index 00000000000000..e988a7ee4071b8 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm636-asus-x00td.dts @@ -0,0 +1,682 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2022, Aboothahir U + */ + +/dts-v1/; + +#include "sdm636.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" +#include +#include + +/delete-node/ &qhee_code; +/delete-node/ &smem_region; +/delete-node/ &tz_mem; +/delete-node/ &adsp_region; +/delete-node/ &buffer_mem; +/delete-node/ &zap_shader_region; + +/ { + model = "Asus Zenfone Max Pro M1"; + compatible = "asus,x00td", "qcom,sdm660", "qcom,sdm636"; + chassis-type = "handset"; + + qcom,msm-id = <0x159 0x0>; + qcom,board-id = <0x1000b 0x0>; + qcom,pmic-id = <0x1001b 0x101011a 0x0 0x0 0x1001b 0x201011a 0x0 0x0 0x1001b 0x102001a 0x0 0x0>; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "framebuffer0"; + + framebuffer0: framebuffer@9d400000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x9d400000 0x0 (1080 * 2160 * 4)>; + status = "okay"; + width = <1080>; + height = <2160>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + + /* In order to allow simpledrm framebuffer to know + * physical dimensions */ + panel = <&panel>; + }; + }; + + gpio-keys { + status = "okay"; + compatible = "gpio-keys"; + + vol_up { + label = "Volume Up"; + gpios = <&tlmm 44 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + vol_down { + label = "Volume Down"; + gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + wlan_msa_guard: wlan-msa-guard@85600000 { + reg = <0x0 0x85600000 0x0 0x100000>; + no-map; + }; + + wlan_msa_mem: wlan-msa-mem@85700000 { + reg = <0x0 0x85700000 0x0 0x100000>; + no-map; + }; + + /* removed_regions in downstream / qhee_code */ + removed_region: removed_region@85800000 { + reg = <0x0 0x85800000 0x0 0x600000>; + no-map; + }; + + smem_region: smem_memory@86000000 { + reg = <0x0 0x86000000 0x0 0x200000>; + no-map; + }; + + /* tz_mem */ + tz_mem: tz_memory@86200000 { + reg = <0x0 0x86200000 0x0 0x2D00000>; + /* 0x86200000 + 0x2D00000 = 0x88F00000 */ + no-map; + }; + + /* downstream has this: */ + /* removed_regions@85800000 { + reg = <0x0 0x85800000 0x0 0x3700000>; + no-map; + }; */ + /* which covers region starting from removed_regions to 0x88F00000 (end of our tz_mem) */ + + /* adsp_fw_region */ + adsp_region: adsp@92a00000 { + reg = <0x0 0x92a00000 0x0 0x1e00000>; + no-map; + }; + + /* cdsp_fw_region */ + buffer_mem: buffer_region@94a00000 { + reg = <0x0 0x94a00000 0x0 0x600000>; + no-map; + }; + + /* cont_splash_region / framebuffer */ + cont_splash: splash_region@9d400000 { + reg = <0x0 0x9d400000 0x0 0x2400000>; + no-map; + }; + + zap_shader_region: gpu@fa800000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xfa800000 0x0 0x2000>; + no-map; + }; + + ramoops@a0000000 { + compatible = "ramoops"; + reg = <0x0 0xa0000000 0x0 0x400000>; + console-size = <0x20000>; + record-size = <0x20000>; + ftrace-size = <0x0>; + pmsg-size = <0x20000>; + }; + }; + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + regulator-boot-on; + }; + + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <5000000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4350000>; + }; +}; + +&blsp2_uart1 { + status = "okay"; + /* HCI Bluetooth */ + bluetooth { + compatible = "qcom,wcn3990-bt"; // common for all QCOM + vddxo-supply = <&vreg_l9a_1p8>; // downstream: vdd-core-supply + vddrf-supply = <&vreg_l6a_1p3>; // vdd-pa-supply + vddch0-supply = <&vreg_l19a_3p3>; // vdd-ldo-supply + max-speed = <3200000>; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <525000>; + regulator-max-microvolt = <950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1370000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + /* This gives power to the LPDDR4: never turn it off! */ + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l16a_2p7: l16 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <250>; + regulator-always-on; + }; + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + }; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + }; + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + /* SDHCI 3.3V signal doesn't seem to be supported. */ + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2696000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l3b_3p3: l3 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + regulator-always-on; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + }; + }; +}; + +&remoteproc_mss { + firmware-name = "mba.mbn", "modem.mdt"; + status = "okay"; +}; + +&sdhc_1 { + status = "okay"; + bus-width = <8>; + non-removable; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + + +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; + + panel_reset_gpio: panel-reset-gpio { + pins = "gpio53"; + function = "gpio"; + drive-strength = <8>; + bias-disable = <0>; + }; + + mdss_dsi_suspend: mdss-dsi-suspend { + pins = "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + panel_te_gpio: panel-te-gpio { + pins = "gpio59"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; +}; + +&usb3 { + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb3_dwc3 { + status = "okay"; + dr_mode = "peripheral"; + extcon = <&extcon_usb>; + + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; +}; + +&wifi { + vdd-1.8-xo-supply = <&vreg_l9a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l6a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l19a_3p3>; + + status = "okay"; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&blsp_i2c2 { + status = "okay"; +}; + +&blsp_i2c4 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + touchscreen@62 { + compatible = "novatek,nt36525"; + reg = <0x62>; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + }; +}; + +&blsp_i2c6 { + status = "okay"; + + tfa98xx@34 { + compatible = "nxp,tfa98xx"; + reg = <0x34>; + }; +}; + +&blsp_i2c7 { /* for P/L Sensor */ + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-supply = <&vreg_l1a_1p225>; + + panel: panel@0 { + reg = <0>; + compatible = "asus,nt36672-txd"; + + backlight = <&pm660l_wled>; + + reset-gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>; + disp-te-gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>; + + width-mm = <68>; + height-mm = <136>; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_reset_gpio &panel_te_gpio>; + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&vreg_l1b_0p925>; + status = "okay"; +}; + +&pm660l_wled { + status = "okay"; + default-brightness = <512>; +}; + +&gcc { + status = "okay"; +}; + +&gpucc { + status = "okay"; +}; + +&mmcc { + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&anoc2_smmu { + status = "okay"; +}; + +&kgsl_smmu { + status = "okay"; +}; + +&lpass_smmu { + status = "okay"; +}; + +&adreno_gpu { + status = "okay"; + zap-shader { + memory-region = <&zap_shader_region>; + firmware-name = "qcom/a512_zap.mdt"; + }; + // These OPPs are correct, but we are lacking support for the + // GPU regulator. Hence, disable them for now to prevent the + // platform from hanging on high graphics loads + opp-table { + /delete-node/ opp-700000000; + /delete-node/ opp-266000000; + }; +}; + +&adsp_pil { + status = "okay"; + firmware-name = "adsp.mdt"; +}; + +&venus { + status = "okay"; + firmware-name = "qcom/venus-4.4/venus.mdt"; +}; + +&pm660_charger { + status = "okay"; + monitored-battery = <&battery>; +}; + +&pm660_fg { + status = "okay"; + monitored-battery = <&battery>; + qcom,battery-capacity-ua = <5000000>; + qcom,min-voltage-uv= <3400000>; + qcom,max-voltage-uv= <4350000>; +}; + +&pm660_haptics { + status = "okay"; +}; + +&pm660_rradc { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm636-xiaomi-tulip.dts b/arch/arm64/boot/dts/qcom/sdm636-xiaomi-tulip.dts new file mode 100644 index 00000000000000..147fb06be8e6dc --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm636-xiaomi-tulip.dts @@ -0,0 +1,604 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2022 Gianluca Boiano + +/dts-v1/; + +#include "sdm636.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" +#include +#include +#include + +/delete-node/ &tz_mem; + +/ { + model = "Xiaomi Redmi Note 6 Pro"; + compatible = "xiaomi,tulip", "qcom,sdm660", "qcom,sdm636"; + chassis-type = "handset"; + + aliases { + serial0 = &blsp1_uart2; /* Debug UART */ + serial1 = &blsp2_uart1; /* Bluetooth UART */ + }; + + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <4000000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4408000>; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + framebuffer0: framebuffer@9d400000 { + compatible = "simple-framebuffer"; + reg = <0 0x9d400000 0x0 (1080 * 2280 * 4)>; + width = <1080>; + height = <2280>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + + /* In order to allow simple-framebuffer to know + * physical dimensions */ + panel = <&panel>; + }; + }; + + gpio-hall-sensor { + compatible = "gpio-keys"; + label = "Hall effect sensor"; + + pinctrl-names = "default"; + pinctrl-0 = <&hall_sensor_default>; + + hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + linux,can-disable; + wakeup-source; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-volup { + label = "Volume Up"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@a0000000 { + compatible = "ramoops"; + reg = <0x0 0xa0000000 0x0 0x400000>; + console-size = <0x20000>; + record-size = <0x20000>; + ftrace-size = <0x0>; + pmsg-size = <0x20000>; + }; + + framebuffer_mem: memory@9d400000 { + reg = <0x0 0x9d400000 0x0 (1080 * 2280 * 4)>; + no-map; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + + regulator-always-on; + regulator-boot-on; + }; +}; + +&adsp_pil { + firmware-name = "adsp.mdt"; + + status = "okay"; +}; + +&anoc2_smmu { + status = "okay"; +}; + +&blsp_i2c1 { + status = "okay"; + + /* Novatek NT36672A touchscreen */ + touchscreen@62 { + compatible = "novatek,nt36525"; + reg = <0x62>; + interrupt-parent = <&tlmm>; + vdd-supply = <&vreg_l11a_1p8>; + vio-supply = <&vreg_l11a_1p8>; + interrupts = <67 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&ts_pins_active>; + pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <2280>; + }; +}; + +&blsp_i2c2 { + status = "okay"; +}; + +&blsp_i2c6 { + status = "okay"; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&blsp2_uart1 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn3990-bt"; + vddxo-supply = <&vreg_l9a_1p8>; // downstream: vdd-core-supply + vddrf-supply = <&vreg_l6a_1p3>; // vdd-pa-supply + vddch0-supply = <&vreg_l19a_3p3>; // vdd-ldo-supply + vddio-supply = <&vreg_l13a_1p8>; // chip-pwd-supply ? // TODO: check + max-speed = <3200000>; + }; +}; + +&lpass_smmu { + status = "okay"; +}; + +&mdss_dsi0 { + #address-cells = <1>; + #size-cells = <0>; + + panel: panel@0 { + compatible = "tianma,nt36672a-xiaomi-tulip-simple"; + reg = <0>; + + reset-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + + backlight = <&pm660l_wled>; + + pinctrl-names = "default"; + pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; + + width-mm = <68>; + height-mm = <143>; + }; +}; + +&pm660_charger { + monitored-battery = <&battery>; + + status = "okay"; +}; + +&pm660_fg { + monitored-battery = <&battery>; + qcom,battery-capacity-ua = <4000000>; + qcom,min-voltage-uv= <3400000>; + qcom,max-voltage-uv= <4408000>; + + status = "okay"; +}; + +&pm660_haptics { + status = "okay"; +}; + +&pm660_rradc { + status = "okay"; +}; + +&pm660l_wled { + status = "okay"; + + qcom,switching-freq = <800>; + qcom,current-limit-microamp = <20000>; + qcom,num-strings = <2>; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = ; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-pll-supply = <&vreg_l10a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&remoteproc_mss { + firmware-name = "mba.mbn", "modem.mdt"; + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + }; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + }; + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + /* SDHCI 3.3V signal doesn't seem to be supported. */ + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2696000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l3b_3p3: l3 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + regulator-always-on; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <525000>; + regulator-max-microvolt = <950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1370000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + /* This gives power to the LPDDR4: never turn it off! */ + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + }; +}; + +&sdc2_state_on { + sd-cd-pins { + pins = "gpio54"; + function = "gpio"; + bias-pull-up; + drive-strength = <2>; + }; +}; + +&sdc2_state_off { + sd-cd-pins { + pins = "gpio54"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; +}; + +&sdhc_1 { + status = "okay"; + supports-cqe; + + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; + + hall_sensor_default: hall-sensor-state { + pins = "gpio75"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; + }; + + mdss_dsi_active: mdss_dsi_active { + function = "gpio"; + pins = "gpio53"; + drive-strength = <8>; + bias-disable; + }; + + mdss_te_active: mdss_te_active { + pins = "gpio59"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + ts_pins_active: ts-pins-active-state { + pins = "gpio66", "gpio67"; + function = "gpio"; + drive-strength = <16>; + bias-pull-up; + }; + + ts_rst_sleep: ts-rst-sleep-state { + pins = "gpio66"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + ts_int_sleep: ts-int-sleep-state { + pins = "gpio67"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&usb3 { + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + dr_mode = "peripheral"; + + status = "okay"; +}; + +&venus { + status = "okay"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l5a_0p848>; + vdd-1.8-xo-supply = <&vreg_l9a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l6a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l19a_3p3>; + vdd-3.3-ch1-supply = <&vreg_l19a_3p3>; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover-common.dtsi b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover-common.dtsi new file mode 100644 index 00000000000000..af9d96e1027d6a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover-common.dtsi @@ -0,0 +1,598 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, Mark Hargreaves + */ + +/dts-v1/; +#include "sdm660.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" +#include +#include + +/delete-node/ &adsp_region; +/delete-node/ &buffer_mem; +/delete-node/ &mba_region; +/delete-node/ &zap_shader_region; + +/ { + aliases { + serial0 = &blsp1_uart2; /* Debug UART */ + serial1 = &blsp2_uart1; /* Bluetooth UART */ + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + simplefb: framebuffer@9d400000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x9d400000 0x0 (1200 * 1920 * 4)>; + width = <1200>; + height = <1920>; + stride = <(1200 * 4)>; + format = "a8r8g8b8"; + }; + }; + + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <4000000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4408000>; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + + regulator-always-on; + regulator-boot-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-volup { + label = "Volume up"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + ramoops@a0000000 { + compatible = "ramoops"; + reg = <0x0 0xa0000000 0x0 0x400000>; + console-size = <0x20000>; + record-size = <0x20000>; + ftrace-size = <0x0>; + pmsg-size = <0x20000>; + }; + + adsp_region: adsp@92a00000 { + reg = <0x0 0x92a00000 0x0 0x1f00000>; + no-map; + }; + + zap_shader_region: gpu@f0b00000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xf0b00000 0x0 0x2000>; + no-map; + }; + + mba_region: mba@94900000 { + reg = <0x0 0x94900000 0x0 0x200000>; + no-map; + }; + + buffer_mem: buffer_region@94b00000 { + reg = <0x00 0x94b00000 0x00 0x600000>; + no-map; + }; + + framebuffer_memory@9d400000 { + reg = <0x0 0x9d400000 0x0 (1200 * 1920 * 4)>; + no-map; + }; + }; +}; + +&adreno_gpu { + status = "disabled"; // TODO: set to okay when display stack works + + zap-shader { + memory-region = <&zap_shader_region>; + firmware-name = "a512_zap.mdt"; + }; +}; + +&anoc2_smmu { + status = "okay"; +}; + +&blsp2_uart1 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn3990-bt"; + vddxo-supply = <&vreg_l9a_1p8>; // downstream: vdd-core-supply + vddrf-supply = <&vreg_l6a_1p3>; // vdd-pa-supply + vddch0-supply = <&vreg_l19a_3p3>; // vdd-ldo-supply + max-speed = <3200000>; + }; +}; + +&blsp1_uart2 { + status = "disabled"; +}; + +&gpucc { + status = "okay"; +}; + +&kgsl_smmu { + status = "okay"; +}; + +&lpass_smmu { + status = "okay"; +}; + +&mdss { + // status = "okay"; // TODO: enable this when panel works +}; + +&mmcc { + // status = "okay"; // TODO: enable this when panel works +}; + +&mmss_smmu { + status = "okay"; +}; + +&pm660_charger { + monitored-battery = <&battery>; + + status = "okay"; +}; + +&pm660_fg { + monitored-battery = <&battery>; + qcom,battery-capacity-ua = <4000000>; + qcom,min-voltage-uv= <3400000>; + qcom,max-voltage-uv= <4408000>; + + status = "okay"; +}; + +&pm660_rradc { + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = ; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&remoteproc_mss { + firmware-name = "mba.mbn", "modem.mdt"; + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + regulator-ramp-delay = <0>; + }; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + /* SDHCI 3.3V signal doesn't seem to be supported. */ + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2696000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l3b_3p0: l3 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <100000>; + regulator-allow-set-load; + regulator-always-on; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l6b_3p3: l6 { + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <3312000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l9b_0p87: l9 { + /* Unused */ + status = "disabled"; + }; + + vreg_l10b_0p915: l10 { + /* Unused */ + status = "disabled"; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + vreg_s1a_ftapc0: s1 { + /* Unused */ + status = "disabled"; + }; + + vreg_s2a_ftapc1: s2 { + /* Unused */ + status = "disabled"; + }; + + vreg_s3a_hfapc1: s3 { + /* Unused */ + status = "disabled"; + }; + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + regulator-ramp-delay = <0>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + /* regulator-always-on; */ + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <525000>; + regulator-max-microvolt = <952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1368000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1784000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-always-on; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + /* This gives power to the LPDDR4: never turn it off! */ + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1904000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l16a_2p7: l16 { + /* Unused */ + status = "disabled"; + }; + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l18a_1v8: l18 { + status = "disabled"; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + }; +}; + +&sdc2_state_on { + sd-cd-pins { + pins = "gpio54"; + function = "gpio"; + bias-pull-up; + drive-strength = <2>; + }; +}; + +&sdc2_state_off { + sd-cd-pins { + pins = "gpio54"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; +}; + +&sdhc_1 { + status = "okay"; + bus-width = <8>; + non-removable; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; +}; + +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>; + + mdss_dsi_active: mdss-dsi-active-state { + pins = "gpio62"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + mdss_te_active: mdss-te-active-state { + pins = "gpio59"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; +}; + +&usb3 { + qcom,select-utmi-as-pipe-clk; /* Required if only USB 2.0 is available */ + + status = "okay"; +}; + +&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + dr_mode = "peripheral"; + + status = "okay"; +}; + +&venus { + firmware-name = "qcom/venus-4.4/venus.mdt"; + status = "okay"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l5a_0p848>; + vdd-1.8-xo-supply = <&vreg_l9a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l6a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l19a_3p3>; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover-plus.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover-plus.dts new file mode 100644 index 00000000000000..dd9c5f99be9a02 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover-plus.dts @@ -0,0 +1,212 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023, Nickolay Goppen + */ + +/dts-v1/; +#include "sdm660-xiaomi-clover-common.dtsi" + +/ { + model = "Xiaomi Mi Pad 4 Plus"; + compatible = "xiaomi,clover-plus", "qcom,sdm660"; + qcom,board-id = <11 0>; + qcom,msm-id = <324 0>; + qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>, <0x0001001b 0x0201011a 0x0 0x0>,<0x0001001b 0x0102001a 0x0 0x0>; + + vreg_bl_vddio: lcd-backlight-regulator { + compatible = "regulator-fixed"; + regulator-name = "vreg_bl_vddio"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + + gpio = <&tlmm 72 0>; + enable-active-high; + + startup-delay-us = <70000>; + + pinctrl-names = "default"; + pinctrl-0 = <&lcd_bl_en_default>; + }; +}; + +&blsp_i2c3 { + status = "okay"; + + touchscreen@5d { + compatible = "goodix,gt9110"; + reg = <0x5d>; + AVDD28-supply = <&vreg_l3b_3p0>; + VDDIO-supply = <&vreg_l11a_1p8>; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default", "int-output-low", "int-output-high", "int-input"; + pinctrl-0 = <&ts_int_default>; + pinctrl-1 = <&ts_int_output_low>; + pinctrl-2 = <&ts_int_output_high>; + pinctrl-3 = <&ts_int_input>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + touchscreen-max-id = <10>; + touchscreen-size-x = <1200>; + touchscreen-size-y = <1920>; + touchscreen-max-w = <512>; + touchscreen-max-p = <512>; + }; +}; + +&blsp_i2c8 { + status = "okay"; + + i2c_backlight: backlight@2c { + compatible = "ti,lp8556"; + reg = <0x2c>; + enable-supply = <&vreg_bl_vddio>; + + bl-name = "lcd-backlight"; + dev-ctrl = /bits/ 8 <0x05>; + init-brt = /bits/ 8 <0x7f>; /* 50% brightness */ + + /* TODO: Stange thing, according to datasheet for LP8556 valid + * EEPROM addresses range from 0x98h to 0xAF, but driver + * thinks A0 is lowest valid address. So write to 9E will be + * silently discarded. Bug in driver? */ + rom-9eh { + rom-addr = /bits/ 8 <0x9E>; + rom-val = /bits/ 8 <0x20>; + }; + rom-a0h { + rom-addr = /bits/ 8 <0xa0>; + rom-val = /bits/ 8 <0x09>; + }; + rom-a1h { + rom-addr = /bits/ 8 <0xa1>; + rom-val = /bits/ 8 <0x5f>; + }; + rom-a3h { + rom-addr = /bits/ 8 <0xa3>; + rom-val = /bits/ 8 <0x0e>; + }; + rom-a5h { + rom-addr = /bits/ 8 <0xa5>; + rom-val = /bits/ 8 <0x24>; + }; + rom-a9h { + rom-addr = /bits/ 8 <0xa9>; + rom-val = /bits/ 8 <0xa0>; + }; + rom-aeh { + rom-addr = /bits/ 8 <0xae>; + rom-val = /bits/ 8 <0x0e>; + }; + }; +}; + +&mdss_dsi0 { + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + vdd-supply = <&vreg_l1b_0p925>; + vdda-supply = <&vreg_l1a_1p225>; + //vdda-1p2-supply = <0x109>; // pm660_ldoa1 + //vdda-0p9-supply = <0x105>; // pm660l_ldob1 + //vdda-3p3-supply = <0x197>; // pm660l_ldob6 + //wqhd-vddio-supply = <0x17e>; // pm660_ldoa11 + + panel: panel@0 { + compatible = "boe,nt51021-10wu"; + reg = <0>; + + backlight = <&i2c_backlight>; + + reset-gpios = <&tlmm 62 GPIO_ACTIVE_HIGH>; // not used by panel-simple + //disp-te-gpios = <&pm660l_gpios GPIO_ACTIVE_HIGH>; // used by msm dsi host + + pinctrl-names = "default"; + pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; + + //pp1800-supply = <&vreg_l11a_1p8>; // wqhd-vddio-supply + // supply is the same for touchscreen + + width-mm = <135>; + height-mm = <216>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&vreg_l1b_0p925>; + status = "okay"; +}; + +&simplefb { + /* In order to allow simledrm framebuffer to know panel + * physical size to allow userspace to do proper DPI scaling */ + panel = <&panel>; +}; + +&tlmm { + lcd_bl_en_default: lcd-bl-en-default-state { + pins = "gpio72"; + function = "gpio"; + drive-strength = <10>; + output-low; + bias-disable; + }; + + ts_int_default: ts_int_default { + mux { + pins = "gpio67"; + function = "gpio"; + }; + config { + pins = "gpio67"; + drive-strength = <16>; + input-enable; + bias-disable; + }; + }; + + ts_int_output_high: ts_int_output_high { + mux { + pins = "gpio67"; + function = "gpio"; + }; + config { + pins = "gpio67"; + output-high; + }; + }; + + ts_int_output_low: ts_int_output_low { + mux { + pins = "gpio67"; + function = "gpio"; + }; + config { + pins = "gpio67"; + output-low; + }; + }; + + ts_int_input: ts_int_input { + mux { + pins = "gpio67"; + function = "gpio"; + }; + config { + pins = "gpio67"; + input-enable; + bias-disable; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover.dts new file mode 100644 index 00000000000000..d37d7e33b8f79c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2020, Mark Hargreaves + */ + +/dts-v1/; +#include "sdm660-xiaomi-clover-common.dtsi" + +/ { + model = "Xiaomi Mi Pad 4"; + compatible = "xiaomi,clover", "qcom,sdm660"; + qcom,board-id = <11 0>; + qcom,msm-id = <324 0>; + qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>, <0x0001001b 0x0201011a 0x0 0x0>,<0x0001001b 0x0102001a 0x0 0x0>; +}; + +&blsp_i2c3 { + status = "okay"; + + touchscreen@38 { + compatible = "edt,edt-ft5406", "edt,edt-ft5x06"; + reg = <0x38>; + vcc-supply = <&vreg_l11a_1p8>; + pinctrl-0 = <&ts_int_active &ts_rst>; + pinctrl-names = "default"; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1200>; + touchscreen-size-y = <1920>; + }; +}; + +&tlmm { + ts_int_active: ts-int-active { + pins = "gpio67"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_rst: ts-rst { + pins = "gpio66"; + drive-strength = <8>; + bias-pull-up; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-jasmine.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-jasmine.dts new file mode 100644 index 00000000000000..df73514cb44fbe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-jasmine.dts @@ -0,0 +1,546 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2022, Joe Mason + */ + +/dts-v1/; + +#include "sdm660.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" +#include +#include +#include +#include +#include + +/ { + model = "Xiaomi A2"; + compatible = "xiaomi,jasmine", "qcom,sdm660"; + chassis-type = "handset"; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + gpio_keys { + status = "okay"; + compatible = "gpio-keys-polled"; + poll-interval = <100>; + label = "Volume up"; + pinctrl-names = "default"; + pinctrl-0 = <&vol_up_gpio_default>; + + vol_up { + label = "Volume Up"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + debounce-interval = <15>; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@a0000000 { + compatible = "ramoops"; + reg = <0x0 0xa0000000 0x0 0x400000>; + console-size = <0x20000>; + record-size = <0x20000>; + ftrace-size = <0x0>; + pmsg-size = <0x20000>; + }; + + framebuffer_mem: memory@9d400000 { + reg = <0x0 0x9d400000 0x0 0x23ff000>; + no-map; + }; + }; + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&blsp_i2c1 { + status = "okay"; + /* Novatek touchscreen device tree node */ + touchscreen@62 { + compatible = "novatek,nt36525"; + reg = <0x62>; + vcc-supply = <&vreg_l11a_1p8>; + pinctrl-0 = <&ts_int_active &ts_rst_n>; + pinctrl-names = "default"; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <2160>; + status = "okay"; + }; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + vdda-supply = <&vreg_l1a_1p225>; + + panel@0 { + compatible = "mdss,nt36672-tianma"; + reg = <0>; + + reset-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + disp-te-gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>; + + backlight = <&pm660l_wled>; + + pinctrl-names = "default"; + pinctrl-0 = <&panel_reset_n &mdp_vsync_n>; + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&vreg_l1b_0p925>; + status = "okay"; +}; + +&pm660l_wled { + status = "okay"; +}; + +&gcc { + status = "okay"; +}; + +&gpucc { + status = "okay"; +}; + +&mmcc { + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&anoc2_smmu { + status = "okay"; +}; + +&kgsl_smmu { + status = "okay"; +}; + +&lpass_smmu { + status = "okay"; +}; + +&adreno_gpu { + status = "okay"; + zap-shader { + memory-region = <&zap_shader_region>; + firmware-name = "qcom/a512_zap.mdt"; + }; +}; + +&adsp_pil { + firmware-name = "qcom/adsp.mdt"; +}; + +&venus { + status = "okay"; + firmware-name = "qcom/venus-4.4/venus.mdt"; +}; + +&pm660l_gpios { + vol_up_gpio_default: vol-up-gpio-default { + pins = "gpio7"; + function = "normal"; + bias-pull-up; + input-enable; + qcom,drive-strength = ; + }; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + status = "okay"; + + linux,code = ; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&sdhc_1 { + status = "okay"; + supports-cqe; + + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + +&sdhc_2 { + status = "okay"; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + +&usb3 { + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + + dr_mode = "peripheral"; + extcon = <&extcon_usb>; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + }; + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + /* SDHCI 3.3V signal doesn't seem to be supported. */ + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2696000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l3b_3p3: l3 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <525000>; + regulator-max-microvolt = <950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1370000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + }; + + /* This gives power to the LPDDR4: never turn it off! */ + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1780000>; + regulator-max-microvolt = <1950000>; + regulator-enable-ramp-delay = <250>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l16a_2p7: l16 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <250>; + regulator-always-on; + }; + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; + + ts_rst_n: ts-rst-n { + pins = "gpio66"; + function = "gpio"; + bias-disable; + drive-strength = <8>; + }; + + ts_int_active: ts-int-active { + pins = "gpio67"; + drive-strength = <16>; + bias-pull-up; + }; + + panel_reset_n: panel-rst-n { + pins = "gpio53"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + mdp_vsync_n: mdp-vsync-n { + pins = "gpio59"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-boe.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-boe.dts new file mode 100644 index 00000000000000..1d76db90dbdb88 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-boe.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2024, Barnabas Czeman + */ + +/dts-v1/; + +#include "sdm660-xiaomi-lavender-common.dtsi" + +/ { + model = "Xiaomi Redmi Note 7 (Boe)"; + compatible = "xiaomi,lavender-boe", "qcom,sdm660"; +}; + +&panel { + compatible = "boe,td4320"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-common.dtsi similarity index 77% rename from arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts rename to arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-common.dtsi index 7167f75bced3fd..9c031a60c7f6b0 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-common.dtsi @@ -12,13 +12,16 @@ #include #include +/delete-node/ &zap_shader_region; + / { model = "Xiaomi Redmi Note 7"; compatible = "xiaomi,lavender", "qcom,sdm660"; chassis-type = "handset"; aliases { - serial0 = &blsp1_uart2; + serial0 = &blsp1_uart2; /* Debug UART */ + serial1 = &blsp2_uart1; /* Bluetooth UART */ }; chosen { @@ -38,6 +41,14 @@ }; }; + battery: battery { + compatible = "simple-battery"; + + charge-full-design-microamp-hours = <4000000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4400000>; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; @@ -77,6 +88,15 @@ reg = <0x0 0x9d400000 0x0 0x23ff000>; no-map; }; + + /* from downstream dmesg: + * subsys-pil-tz soc:qcom,kgsl-hyp: a512_zap: loading from + * 0x00000000fc400000 to 0x00000000fc402000 */ + zap_shader_region: gpu@fc400000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xfc400000 0x0 0x2000>; + no-map; + }; }; /* @@ -89,10 +109,125 @@ }; }; +&adreno_gpu { + status = "okay"; + + zap-shader { + memory-region = <&zap_shader_region>; + }; +}; + +&anoc2_smmu { + status = "okay"; +}; + &blsp1_uart2 { status = "okay"; }; +&blsp2_uart1 { + status = "okay"; + + bluetooth { + compatible = "qcom,wcn3990-bt"; + vddxo-supply = <&vreg_l9a_1p8>; // downstream: vdd-core-supply + vddrf-supply = <&vreg_l6a_1p3>; // vdd-pa-supply + vddch0-supply = <&vreg_l19a_3p3>; // vdd-ldo-supply + vddio-supply = <&vreg_l13a_1p8>; // chip-pwd-supply ? // TODO: check + max-speed = <3200000>; + /* Path is relative to the qca/ subdir in lib/firmware. */ + /* firmware-name = "crnv21.bin"; */ // default + }; +}; + +&gpucc { + status = "okay"; +}; + +&kgsl_smmu { + status = "okay"; +}; + +&lpass_smmu { + status = "okay"; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-supply = <&vreg_l1a_1p225>; + + panel: panel@0 { + reg = <0>; + + reset-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + + backlight = <&pm660l_wled>; + + pinctrl-names = "default"; + pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&vreg_l1b_0p925>; + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&pm660_charger { + monitored-battery = <&battery>; + + status = "okay"; +}; + +&pm660_fg { + monitored-battery = <&battery>; + qcom,battery-capacity-ua = <4000000>; + qcom,min-voltage-uv= <3400000>; + qcom,max-voltage-uv= <4408000>; + + status = "okay"; +}; + +&pm660_haptics { + status = "okay"; +}; + +&pm660_rradc { + status = "okay"; +}; + +&pm660l_wled { + status = "okay"; + + qcom,switching-freq = <800>; + qcom,current-limit-microamp = <20000>; + qcom,num-strings = <2>; +}; + &pon_pwrkey { status = "okay"; }; @@ -110,6 +245,11 @@ vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; }; +&remoteproc_mss { + firmware-name = "mba.mbn", "modem.mdt"; + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm660l-regulators"; @@ -126,6 +266,12 @@ vdd_l4_l6-supply = <&vreg_bob>; vdd_bob-supply = <&vph_pwr>; + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + }; + vreg_s1b_1p125: s1 { regulator-min-microvolt = <1125000>; regulator-max-microvolt = <1125000>; @@ -159,6 +305,7 @@ regulator-max-microvolt = <3300000>; regulator-enable-ramp-delay = <250>; regulator-allow-set-load; + regulator-always-on; }; vreg_l4b_2p95: l4 { @@ -198,12 +345,6 @@ regulator-max-microvolt = <3400000>; regulator-enable-ramp-delay = <250>; }; - - vreg_bob: bob { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <500>; - }; }; regulators-1 { @@ -363,14 +504,6 @@ }; }; -&pm660l_wled { - status = "okay"; - - qcom,switching-freq = <800>; - qcom,current-limit-microamp = <20000>; - qcom,num-strings = <2>; -}; - &sdc2_state_on { sd-cd-pins { pins = "gpio54"; @@ -410,6 +543,20 @@ &tlmm { gpio-reserved-ranges = <8 4>; + + mdss_dsi_active: mdss_dsi_active { + function = "gpio"; + pins = "gpio53"; + drive-strength = <8>; + bias-disable; + }; + + mdss_te_active: mdss_te_active { + pins = "gpio59"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; }; &usb3 { @@ -426,3 +573,16 @@ dr_mode = "peripheral"; extcon = <&extcon_usb>; }; + +&venus { + status = "okay"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l5a_0p848>; + vdd-1.8-xo-supply = <&vreg_l9a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l6a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l19a_3p3>; + + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-tianma.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-tianma.dts new file mode 100644 index 00000000000000..f14e214921b46b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-tianma.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2024, Barnabas Czeman + */ + +/dts-v1/; + +#include "sdm660-xiaomi-lavender-common.dtsi" + +/ { + model = "Xiaomi Redmi Note 7 (Tianma)"; + compatible = "xiaomi,lavender-tianma", "qcom,sdm660"; +}; + +&blsp_i2c1 { + status = "okay"; + + /* Novatek NT36672A touchscreen */ + touchscreen@62 { + compatible = "novatek,nt36525"; + reg = <0x62>; + vdd-supply = <&vreg_l11a_1p8>; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&ts_pins_active>; + pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <2340>; + }; +}; + +&panel { + compatible = "tianma,nt36672a-xiaomi-lavender-simple"; +}; + +&tlmm { + ts_pins_active: ts-pins-active-state { + pins = "gpio66", "gpio67"; + function = "gpio"; + drive-strength = <16>; + bias-pull-up; + }; + + ts_rst_sleep: ts-rst-sleep-state { + pins = "gpio66"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + ts_int_sleep: ts-int-sleep-state { + pins = "gpio67"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-platina.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-platina.dts new file mode 100644 index 00000000000000..26fa4c7fe24cfe --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-platina.dts @@ -0,0 +1,787 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2021, AngeloGioacchino Del Regno + * + * Copyright (c) 2022, Molly Sophia + */ + +/dts-v1/; + +#include "sdm660.dtsi" +#include "pm660.dtsi" +#include "pm660l.dtsi" +#include +#include +#include +#include +#include + +/ { + model = "Xiaomi Mi 8 Lite"; + compatible = "xiaomi,platina", "qcom,sdm660"; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer@9d400000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x9d400000 0x0 (1080 * 2280 * 4)>; + width = <1080>; + height = <2280>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ramoops@ffc00000 { + compatible = "ramoops"; + reg = <0x0 0xffc00000 0x0 0x100000>; + record-size = <0x10000>; + console-size = <0x60000>; + ftrace-size = <0x10000>; + pmsg-size = <0x20000>; + ecc-size = <16>; + status = "okay"; + }; + + debug_region@ffb00000 { + reg = <0x00 0xffb00000 0x00 0x100000>; + no-map; + }; + + cdsp-region@94e00000 { + reg = <0x00 0x94e00000 0x00 0x600000>; + no-map; + }; + + removed_region@85800000 { + reg = <0x00 0x85800000 0x00 0x3700000>; + no-map; + }; + + framebuffer_memory@9d400000 { + reg = <0x0 0x9d400000 0x0 (1080 * 2280 * 4)>; + no-map; + }; + }; + + board_vbat: vbat-regulator { + compatible = "regulator-fixed"; + regulator-name = "VBAT"; + + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + regulator-always-on; + regulator-boot-on; + }; + + cam_avdd_front_vreg: cam-avdd-front-vreg { + compatible = "regulator-fixed"; + regulator-name = "cam-avdd-front-vreg"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + startup-delay-us = <0>; + enable-active-high; + gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_avdd_front_default>; + vin-supply = <&vreg_bob>; + }; + + cam_actuator_rear_vreg: cam-actuator-rear-vreg { + compatible = "regulator-fixed"; + regulator-name = "cam-actuator-rear-vreg"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + startup-delay-us = <0>; + enable-active-high; + gpio = <&tlmm 50 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_rear_default>; + vin-supply = <&vreg_bob>; + }; + + cam_avdd_rear_vreg: cam-avdd-rear-vreg { + compatible = "regulator-fixed"; + regulator-name = "cam-avdd-rear-vreg"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + startup-delay-us = <0>; + enable-active-high; + gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_avdd_rear_default>; + vin-supply = <&vreg_bob>; + }; + + cam_dvdd_front_vreg: cam-dvdd-front-vreg { + compatible = "regulator-fixed"; + regulator-name = "cam-dvdd-front-vreg"; + + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + startup-delay-us = <0>; + enable-active-high; + gpio = <&pm660l_gpios 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_dvdd_front_default>; + vin-supply = <&vreg_s5a_1p35>; + }; + + cam_dvdd_rear_vreg: cam-dvdd-rear-vreg { + compatible = "regulator-fixed"; + regulator-name = "cam-dvdd-rear-vreg"; + + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + startup-delay-us = <0>; + enable-active-high; + gpio = <&pm660l_gpios 4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_dvdd_rear_default>; + vin-supply = <&vreg_s5a_1p35>; + }; + + disp_vdd_vreg: disp-vdd-vreg { + compatible = "regulator-fixed"; + regulator-name = "display-vdd"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ts_vdd_vreg: ts-vdd-vreg { + compatible = "regulator-fixed"; + regulator-name = "ts-vdd"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 73 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&ts_vdd_default>; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + + regulator-always-on; + regulator-boot-on; + }; + + gpio_keys { + status = "okay"; + compatible = "gpio-keys"; + label = "Volume up"; + pinctrl-names = "default"; + pinctrl-0 = <&vol_up_gpio_default>; + + vol_up { + label = "Volume Up"; + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + debounce-interval = <15>; + }; + }; + + gpio-hall-sensor { + compatible = "gpio-keys"; + label = "Hall effect sensor"; + + pinctrl-names = "default"; + pinctrl-0 = <&hall_sensor_default>; + + hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + linux,can-disable; + wakeup-source; + }; + }; + + + /* + * Until we hook up type-c detection, we + * have to stick with this. But it works. + */ + extcon_usb: extcon-usb { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; +}; + +&blsp_i2c2 { + status = "okay"; + + /* + * Two instances of SMB1355 charger: 0x8, 0xc but only + * one SMB1355 chip is present on board. What's the + * right address? + */ +}; + +&blsp_i2c4 { + status = "okay"; + /* Novatek device tree node */ + novatek@62 { + compatible = "novatek,nt36525"; + reg = <0x62>; + vcc-supply = <&vreg_l11a_1p8>; + pinctrl-0 = <&ts_int_active &ts_rst_n>; + pinctrl-names = "default"; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <2280>; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&rpm_requests { + pm660l-regulators { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + /* + * At least on Nile's configuration, S3B/S4B (VDD_CX) and + * S5B (VDD_MX) are managed only through RPM Power Domains. + * Trying to set a voltage on the main supply will create + * havoc and freeze the SoC. + * In any case, reference voltages for these regulators are: + * S3B/S4B: 0.870V + * S5B: 0.915V + */ + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <928000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l2b_2p95: l2 { + /* + * This regulator supports 1.648 - 3.104V on this board + * but we set a max voltage of anything less than 2.7V + * to satisfy a condition in sdhci.c that will disable + * 3.3V SDHCI signaling, which happens to be not really + * supported on the Xperia Nile/Ganges platform. + */ + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2696000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l3b_3p3: l3 { + regulator-min-microvolt = <3296000>; + regulator-max-microvolt = <3312000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <100000>; + regulator-allow-set-load; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_29p5: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + regulator-system-load = <800000>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <3128000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + /* L9B (870mV) is currently unused */ + /* L10B (915mV) is currently unused */ + + vreg_bob: bob { + regulator-min-microvolt = <3304000>; + regulator-max-microvolt = <3624000>; + regulator-enable-ramp-delay = <500>; + regulator-ramp-delay = <0>; + }; + }; + + + pm660-regulators { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <2040000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + regulator-ramp-delay = <0>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + regulator-ramp-delay = <0>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1226000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <944000>; + regulator-max-microvolt = <1008000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <944000>; + regulator-max-microvolt = <1008000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1368000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1804000>; + regulator-max-microvolt = <1896000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l10a_1p8: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + + vreg_l11a_1p8: l11 { + regulator-min-microvolt = <1784000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l12a_1p8: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l13a_1p8: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1944000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-boot-on; + regulator-always-on; + }; + + vreg_l14a_1p8: l14 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <1952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l15a_1p8: l15 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + /* DRX: QM13111 */ + vreg_l16a_2p7: l16 { + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2712000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + vreg_l17a_1p8: l17 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + }; + + /* L18A (2.7V) is unused */ + + vreg_l19a_3p3: l19 { + regulator-min-microvolt = <3312000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-ramp-delay = <0>; + regulator-allow-set-load; + }; + }; +}; + +&sdhc_1 { + status = "okay"; + supports-cqe; + + mmc-ddr-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; +}; + +&sdhc_2 { + status = "disabled"; + + vmmc-supply = <&vreg_l5b_29p5>; + vqmmc-supply = <&vreg_l2b_2p95>; +}; + +&pm660_gpios { + nfc_clk_req_n: nfc-clkreq-n { + pins = "gpio4"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-disable; + input-enable; + power-source = <1>; + }; +}; + +&pm660l_gpios { + cam_dvdd_front_default: cam-dvdd-front-default { + pins = "gpio3"; + function = "normal"; + output-low; + power-source = <0>; + }; + + cam_dvdd_rear_default: cam-dvdd-rear-default { + pins = "gpio4"; + function = "normal"; + output-low; + power-source = <0>; + }; + + vol_up_gpio_default: vol-up-gpio-default { + pins = "gpio7"; + function = "normal"; + bias-pull-up; + input-enable; + qcom,drive-strength = ; + }; +}; + +&pon_resin { + linux,code = ; + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; + + camera_rear_default: camera-rear-default { + mclk0 { + pins = "gpio32"; + function = "cam_mclk"; + drive-strength = <4>; + bias-disable; + }; + + rst { + pins = "gpio46"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + }; + + camera_front_default: camera-front-default { + mclk1 { + pins = "gpio33"; + function = "cam_mclk"; + drive-strength = <4>; + bias-disable; + }; + + rst { + pins = "gpio47"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + }; + + camera_front_iris_default: camera-front-iris-default { + mclk1 { + pins = "gpio35"; + function = "cam_mclk"; + drive-strength = <4>; + bias-disable; + }; + + rst { + pins = "gpio52"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + }; + }; + + cam_avdd_front_default: cam-avdd-front-default { + pins = "gpio49"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; + + cam_actuator_rear_default: cam-actuator-rear-default { + pins = "gpio50"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; + + cam_avdd_rear_default: cam-avdd-rear-default { + pins = "gpio51"; + function = "gpio"; + bias-disable; + drive-strength = <2>; + }; + + panel_reset_n: panel-rst-n { + pins = "gpio53"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + mdp_vsync_n: mdp-vsync-n { + pins = "gpio59"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; + + ts_rst_n: ts-rst-n { + pins = "gpio66"; + function = "gpio"; + bias-disable; + drive-strength = <8>; + }; + + ts_int_active: ts-int-active { + pins = "gpio67"; + drive-strength = <16>; + bias-pull-up; + }; + + ts_vdd_default: ts-vdd-default { + pins = "gpio73"; + function = "gpio"; + bias-disable; + drive-strength = <8>; + }; + + hall_sensor_default: hall-sensor-default { + pins = "gpio75"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + input-enable; + }; + +}; + +&adreno_gpu { + status = "disabled"; +}; + +&gpucc { + status = "disabled"; +}; + +&mmcc { + status = "disabled"; +}; + +&qusb2phy0 { + status = "okay"; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-pll-supply = <&vreg_l10a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; +}; + +&usb3 { + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb3_dwc3 { + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + + dr_mode = "peripheral"; + extcon = <&extcon_usb>; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index f89b27c99f40cf..befa4fd665986e 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -83,6 +83,10 @@ opp-supported-hw = <0xff>; }; }; + + zap-shader { + firmware-name = "a512_zap.mbn"; + }; }; &CPU0 { diff --git a/arch/arm64/configs/sdm660_defconfig b/arch/arm64/configs/sdm660_defconfig new file mode 100644 index 00000000000000..91c3cf2ba7e2fc --- /dev/null +++ b/arch/arm64/configs/sdm660_defconfig @@ -0,0 +1,706 @@ +CONFIG_LOCALVERSION="-sdm660" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT=y +CONFIG_PREEMPT=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_PSI=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_UCLAMP_TASK=y +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_UCLAMP_TASK_GROUP=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_MISC=y +CONFIG_USER_NS=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PROFILING=y +CONFIG_KEXEC=y +CONFIG_ARCH_QCOM=y +CONFIG_ARM64_ERRATUM_2441007=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_1542419=y +# CONFIG_ARM64_ERRATUM_2077057 is not set +CONFIG_ARM64_ERRATUM_2441009=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_SCHED_MC=y +CONFIG_NR_CPUS=8 +CONFIG_COMPAT=y +CONFIG_COMPAT_ALIGNMENT_FIXUPS=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_CMDLINE_DROP_DANGEROUS_ANDROID_OPTIONS=y +# CONFIG_EFI is not set +CONFIG_HIBERNATION=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_CPU_IDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=m +CONFIG_CPU_FREQ_GOV_ONDEMAND=m +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m +CONFIG_CPUFREQ_DT=y +CONFIG_ARM_QCOM_CPUFREQ_NVMEM=m +CONFIG_ARM_QCOM_CPUFREQ_HW=m +CONFIG_JUMP_LABEL=y +# CONFIG_GCC_PLUGINS is not set +CONFIG_MODULES=y +CONFIG_MODULE_DEBUG=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_MODULE_COMPRESS_GZIP=y +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_IOSCHED_BFQ is not set +CONFIG_BINFMT_MISC=m +# CONFIG_COMPAT_BRK is not set +CONFIG_KSM=y +CONFIG_MEMORY_FAILURE=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_CMA=y +CONFIG_CMA_AREAS=7 +CONFIG_LRU_GEN=y +CONFIG_LRU_GEN_ENABLED=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IPV6=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +CONFIG_NFT_CT=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_NAT=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_FIB_INET=m +CONFIG_NETFILTER_XTABLES_COMPAT=y +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_IP_VS=m +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_NFCT=y +CONFIG_NFT_DUP_IPV4=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NF_LOG_IPV4=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_NFT_DUP_IPV6=m +CONFIG_NFT_FIB_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_NET_SCHED=y +CONFIG_NET_CLS_CGROUP=m +CONFIG_QRTR=m +CONFIG_QRTR_SMD=m +CONFIG_QRTR_TUN=m +CONFIG_CGROUP_NET_PRIO=y +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m +CONFIG_BT_LEDS=y +CONFIG_BT_MSFTEXT=y +CONFIG_BT_AOSPEXT=y +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_NOKIA=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HCIUART_RTL=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_ATH3K=m +CONFIG_BT_QCOMSMD=m +CONFIG_CFG80211=m +CONFIG_MAC80211=m +CONFIG_MAC80211_LEDS=y +CONFIG_RFKILL=m +CONFIG_NFC=m +CONFIG_NFC_NCI=m +CONFIG_NFC_S3FWRN5_I2C=m +CONFIG_UEVENT_HELPER=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_FW_LOADER_USER_HELPER=y +CONFIG_FW_LOADER_COMPRESS=y +CONFIG_FW_LOADER_COMPRESS_ZSTD=y +# CONFIG_QCOM_EBI2 is not set +CONFIG_QCOM_SSC_BLOCK_BUS=y +CONFIG_CONNECTOR=y +CONFIG_QCOM_QSEECOM=y +CONFIG_GNSS=y +CONFIG_OF_OVERLAY=y +CONFIG_ZRAM=m +CONFIG_ZRAM_DEF_COMP_ZSTD=y +CONFIG_ZRAM_WRITEBACK=y +CONFIG_ZRAM_MEMORY_TRACKING=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NBD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_VIRTIO_BLK=m +CONFIG_QCOM_COINCELL=m +CONFIG_QCOM_FASTRPC=m +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_BLK_DEV_SD=y +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +CONFIG_MD_RAID10=y +CONFIG_MD_RAID456=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=m +CONFIG_DM_THIN_PROVISIONING=m +CONFIG_DM_RAID=m +CONFIG_DM_VERITY=m +CONFIG_NETDEVICES=y +CONFIG_BONDING=m +CONFIG_DUMMY=m +CONFIG_WIREGUARD=m +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_IPVLAN=m +CONFIG_VXLAN=m +CONFIG_TUN=m +CONFIG_VETH=m +CONFIG_VIRTIO_NET=m +CONFIG_NLMON=m +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_ASIX is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_DAVICOM is not set +# CONFIG_NET_VENDOR_ENGLEDER is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_FUNGIBLE is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_ADI is not set +# CONFIG_NET_VENDOR_LITEX is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_MICROSOFT is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +CONFIG_RMNET=m +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VERTEXCOM is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WANGXUN is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +CONFIG_QCOM_IPA=m +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOE=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_HUAWEI_CDC_NCM=m +CONFIG_USB_NET_CDC_MBIM=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_SR9700=m +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CX82310_ETH=m +CONFIG_USB_NET_KALMIA=m +CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_HSO=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_IPHETH=m +CONFIG_USB_SIERRA_NET=m +CONFIG_USB_VL600=m +CONFIG_USB_NET_CH9200=m +CONFIG_USB_NET_AQC111=m +# CONFIG_WLAN_VENDOR_ADMTEK is not set +CONFIG_ATH10K=m +CONFIG_ATH10K_SNOC=m +CONFIG_ATH10K_DEBUG=y +CONFIG_ATH10K_DEBUGFS=y +CONFIG_ATH10K_SPECTRAL=y +# CONFIG_WLAN_VENDOR_ATMEL is not set +# CONFIG_WLAN_VENDOR_BROADCOM is not set +# CONFIG_WLAN_VENDOR_INTEL is not set +# CONFIG_WLAN_VENDOR_INTERSIL is not set +# CONFIG_WLAN_VENDOR_MARVELL is not set +# CONFIG_WLAN_VENDOR_MEDIATEK is not set +# CONFIG_WLAN_VENDOR_MICROCHIP is not set +# CONFIG_WLAN_VENDOR_PURELIFI is not set +# CONFIG_WLAN_VENDOR_RALINK is not set +# CONFIG_WLAN_VENDOR_REALTEK is not set +# CONFIG_WLAN_VENDOR_RSI is not set +# CONFIG_WLAN_VENDOR_SILABS is not set +# CONFIG_WLAN_VENDOR_ST is not set +# CONFIG_WLAN_VENDOR_TI is not set +# CONFIG_WLAN_VENDOR_ZYDAS is not set +# CONFIG_WLAN_VENDOR_QUANTENNA is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +CONFIG_KEYBOARD_GPIO_POLLED=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_MOUSE_SYNAPTICS_USB=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_INPUT_TABLET=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_GOODIX=m +CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS=m +CONFIG_TOUCHSCREEN_NT36XXX=m +CONFIG_TOUCHSCREEN_EDT_FT5X06=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_PM8941_PWRKEY=y +CONFIG_INPUT_PM8XXX_VIBRATOR=y +CONFIG_INPUT_QCOM_SPMI_HAPTICS=m +CONFIG_INPUT_UINPUT=y +CONFIG_RMI4_CORE=y +CONFIG_RMI4_I2C=y +CONFIG_RMI4_F11=y +CONFIG_RMI4_F12=y +# CONFIG_SERIO is not set +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_LEGACY_TIOCSTI is not set +CONFIG_SERIAL_MSM=y +CONFIG_SERIAL_MSM_CONSOLE=y +CONFIG_RPMSG_TTY=m +CONFIG_SERIAL_DEV_BUS=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_GPIO=y +CONFIG_I2C_QUP=y +CONFIG_I2C_SLAVE=y +CONFIG_SPI=y +CONFIG_SPI_MEM=y +CONFIG_SPI_BITBANG=m +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_PINCTRL_MSM=y +CONFIG_PINCTRL_SDM660=y +CONFIG_PINCTRL_QCOM_SPMI_PMIC=y +CONFIG_PINCTRL_QCOM_SSBI_PMIC=y +CONFIG_POWER_RESET_MSM=y +CONFIG_POWER_RESET_QCOM_PON=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_NVMEM_REBOOT_MODE=y +CONFIG_BATTERY_QCOM_BATTMGR=m +CONFIG_CHARGER_QCOM_SMBB=m +CONFIG_BATTERY_RT5033=m +CONFIG_BATTERY_QCOM_FG=m +CONFIG_CHARGER_QCOM_SMB2=m +CONFIG_THERMAL=y +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_BANG_BANG=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_CPU_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_THERMAL_EMULATION=y +CONFIG_GENERIC_ADC_THERMAL=m +CONFIG_QCOM_TSENS=y +CONFIG_QCOM_SPMI_ADC_TM5=m +CONFIG_QCOM_SPMI_TEMP_ALARM=m +CONFIG_QCOM_LMH=m +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +CONFIG_QCOM_WDT=m +CONFIG_MFD_QCOM_RPM=y +CONFIG_MFD_SPMI_PMIC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_NETLINK_EVENTS=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_REFGEN=m +CONFIG_REGULATOR_QCOM_RPMH=y +CONFIG_REGULATOR_QCOM_SMD_RPM=y +CONFIG_REGULATOR_QCOM_SPMI=y +CONFIG_REGULATOR_QCOM_USB_VBUS=y +CONFIG_REGULATOR_QCOM_LABIBB=m +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_QCOM_CAMSS=m +CONFIG_VIDEO_QCOM_VENUS=m +CONFIG_DRM=y +CONFIG_DRM_FBDEV_OVERALLOC=200 +CONFIG_DRM_MSM=m +# CONFIG_DRM_MSM_MDP4 is not set +# CONFIG_DRM_MSM_HDMI is not set +CONFIG_DRM_PANEL_BOE_TD4320=m +CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m +CONFIG_DRM_PANEL_FT8716U=m +CONFIG_DRM_PANEL_DSI_CM=y +CONFIG_DRM_PANEL_NOVATEK_NT36672A=m +CONFIG_DRM_PANEL_NOVATEK_NT36672_TIANMA_JASMINE=m +CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_PANEL_TRULY_TD4322=m +CONFIG_DRM_SIMPLEDRM=y +CONFIG_DRM_GUD=m +CONFIG_FB=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_QCOM_WLED=y +CONFIG_BACKLIGHT_LP855X=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y +CONFIG_LOGO=y +CONFIG_DRM_ACCEL=y +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_QCOM=m +CONFIG_SND_SOC_APQ8016_SBC=m +CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m +CONFIG_UHID=m +CONFIG_HID_RAZER=m +CONFIG_I2C_HID_OF=m +CONFIG_I2C_HID_OF_GOODIX=m +CONFIG_USB_LED_TRIG=y +CONFIG_USB_CONN_GPIO=m +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=m +CONFIG_USB_MON=m +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI_RENESAS=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_UAS=m +CONFIG_USBIP_CORE=m +CONFIG_USBIP_VHCI_HCD=m +CONFIG_USBIP_HOST=m +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_QCOM_EUD=m +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_MIDI2=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +CONFIG_USB_FUNCTIONFS=m +CONFIG_TYPEC=y +CONFIG_TYPEC_UCSI=y +CONFIG_UCSI_PMIC_GLINK=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LEDS_TRIGGER_PATTERN=m +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PM8XXX=y +CONFIG_DMADEVICES=y +CONFIG_QCOM_BAM_DMA=y +CONFIG_QCOM_GPI_DMA=y +# CONFIG_SURFACE_PLATFORMS is not set +CONFIG_COMMON_CLK_QCOM=y +CONFIG_QCOM_CLK_SMD_RPM=y +CONFIG_QCOM_CLK_RPMH=y +CONFIG_SDM_MMCC_660=y +CONFIG_SDM_GPUCC_660=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_QCOM=y +CONFIG_MAILBOX=y +CONFIG_QCOM_APCS_IPC=y +CONFIG_QCOM_IPCC=m +CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y +CONFIG_IOMMU_DEBUGFS=y +CONFIG_ARM_SMMU=y +CONFIG_ARM_SMMU_V3=y +CONFIG_QCOM_IOMMU=y +CONFIG_REMOTEPROC=y +CONFIG_QCOM_Q6V5_MSS=m +CONFIG_QCOM_Q6V5_PAS=m +CONFIG_QCOM_Q6V5_WCSS=m +CONFIG_QCOM_SYSMON=m +CONFIG_QCOM_WCNSS_PIL=m +CONFIG_RPMSG_CHAR=y +CONFIG_RPMSG_CTRL=y +CONFIG_RPMSG_NS=y +CONFIG_RPMSG_QCOM_GLINK_RPM=y +CONFIG_RPMSG_QCOM_GLINK_SMEM=y +CONFIG_RPMSG_QCOM_SMD=y +CONFIG_SOUNDWIRE=m +CONFIG_SOUNDWIRE_QCOM=m +CONFIG_QCOM_AOSS_QMP=m +CONFIG_QCOM_COMMAND_DB=y +CONFIG_QCOM_GENI_SE=m +CONFIG_QCOM_GSBI=m +CONFIG_QCOM_LLCC=m +CONFIG_QCOM_OCMEM=m +CONFIG_QCOM_PMIC_GLINK=m +CONFIG_QCOM_RAMP_CTRL=m +CONFIG_QCOM_RMTFS_MEM=m +CONFIG_QCOM_RPM_MASTER_STATS=m +CONFIG_QCOM_RPMH=y +CONFIG_QCOM_SMEM=y +CONFIG_QCOM_SMD_RPM=y +CONFIG_QCOM_SMP2P=y +CONFIG_QCOM_SMSM=y +CONFIG_QCOM_SOCINFO=y +CONFIG_QCOM_SPM=m +CONFIG_QCOM_STATS=m +CONFIG_QCOM_WCNSS_CTRL=m +CONFIG_QCOM_APR=m +CONFIG_QCOM_ICC_BWMON=m +CONFIG_QCOM_CPR=m +CONFIG_QCOM_RPMHPD=y +CONFIG_QCOM_RPMPD=y +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_DEVFREQ_GOV_PASSIVE=y +CONFIG_EXTCON_GPIO=y +CONFIG_EXTCON_SM5502=y +CONFIG_EXTCON_USB_GPIO=y +CONFIG_MEMORY=y +CONFIG_IIO=m +CONFIG_BMC150_ACCEL=m +CONFIG_QCOM_SPMI_RRADC=m +CONFIG_QCOM_SPMI_IADC=m +CONFIG_QCOM_SPMI_VADC=m +CONFIG_QCOM_SPMI_ADC5=m +CONFIG_BMG160=m +CONFIG_LTR501=m +CONFIG_BMC150_MAGN_I2C=m +CONFIG_PWM=y +CONFIG_PWM_CLK=m +CONFIG_RESET_GPIO=y +CONFIG_PHY_QCOM_QMP=y +CONFIG_PHY_QCOM_QUSB2=y +CONFIG_PHY_QCOM_SNPS_EUSB2=y +CONFIG_PHY_QCOM_EUSB2_REPEATER=y +CONFIG_PHY_QCOM_M31_USB=m +CONFIG_PHY_QCOM_USB_HS=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_NVMEM_QCOM_QFPROM=y +CONFIG_NVMEM_QCOM_SEC_QFPROM=m +CONFIG_SLIM_QCOM_CTRL=m +CONFIG_SLIM_QCOM_NGD_CTRL=m +CONFIG_INTERCONNECT=y +CONFIG_INTERCONNECT_QCOM=y +CONFIG_INTERCONNECT_QCOM_SDM660=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_BTRFS_FS=y +CONFIG_F2FS_FS=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA=y +CONFIG_AUTOFS_FS=y +CONFIG_FUSE_FS=m +CONFIG_CUSE=m +CONFIG_OVERLAY_FS=m +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_UDF_FS=m +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_UTF8=y +CONFIG_EXFAT_FS=y +CONFIG_NTFS3_FS=m +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +CONFIG_PSTORE=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_PMSG=y +CONFIG_PSTORE_RAM=y +CONFIG_NFS_FS=m +CONFIG_NFS_V4=m +CONFIG_NFSD=m +CONFIG_NFSD_V4=y +CONFIG_CIFS=m +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_KEY_DH_OPERATIONS=y +CONFIG_SECURITY=y +CONFIG_SECURITYFS=y +CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity" +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_CHACHA20=m +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_POLY1305=m +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZ4=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_CRYPTO_USER_API_RNG=m +CONFIG_CRYPTO_USER_API_AEAD=m +CONFIG_CRYPTO_NHPOLY1305_NEON=m +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +CONFIG_CRYPTO_SM3_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_BS=m +CONFIG_CRYPTO_SM4_ARM64_CE=m +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_DEV_QCOM_RNG=m +CONFIG_PKCS8_PRIVATE_KEY_PARSER=m +CONFIG_DMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +CONFIG_PANIC_TIMEOUT=-1 +CONFIG_HARDLOCKUP_DETECTOR=y +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_RCU_TRACE is not set +# CONFIG_FTRACE is not set diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index c003f970189b06..6f6cb51a285a16 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1767,7 +1767,8 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) nr_rings = 4; - if (config->info->revn == 510) + if (config->info->revn == 508 || config->info->revn == 510 + || config->info->revn == 509 || config->info->revn == 512) nr_rings = 1; ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, nr_rings); diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index c3703a51287b46..d248966bf1bdce 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -591,6 +591,14 @@ MODULE_FIRMWARE("qcom/a330_pm4.fw"); MODULE_FIRMWARE("qcom/a330_pfp.fw"); MODULE_FIRMWARE("qcom/a420_pm4.fw"); MODULE_FIRMWARE("qcom/a420_pfp.fw"); +MODULE_FIRMWARE("qcom/a508_zap.mdt"); +MODULE_FIRMWARE("qcom/a508_zap.b00"); +MODULE_FIRMWARE("qcom/a508_zap.b01"); +MODULE_FIRMWARE("qcom/a508_zap.b02"); +MODULE_FIRMWARE("qcom/a512_zap.mdt"); +MODULE_FIRMWARE("qcom/a512_zap.b00"); +MODULE_FIRMWARE("qcom/a512_zap.b01"); +MODULE_FIRMWARE("qcom/a512_zap.b02"); MODULE_FIRMWARE("qcom/a530_pm4.fw"); MODULE_FIRMWARE("qcom/a530_pfp.fw"); MODULE_FIRMWARE("qcom/a530v3_gpmu.fw2"); diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 2ae0eb0638f325..59e1a00ea18162 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -78,6 +78,15 @@ config DRM_PANEL_BOE_TH101MB31UIG002_28A resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI interface to the host and has a built-in LED backlight. +config DRM_PANEL_BOE_TD4320 + tristate "BOE TD4320 DSI panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for BOE TD4320 panel + used in Xiaomi Redmi Note 7 phone. + config DRM_PANEL_BOE_TV101WUM_NL6 tristate "BOE TV101WUM and AUO KD101N80 45NA 1200x1920 panel" depends on OF @@ -108,6 +117,15 @@ config DRM_PANEL_ELIDA_KD35T133 KD35T133 controller for 320x480 LCD panels with MIPI-DSI system interfaces. +config DRM_PANEL_FT8716U + tristate "FT8716U panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for the FT8716U controller + for 1080x1920 LCD panels. Found on some (most?) Nokia PL2 (6.1) phones. + config DRM_PANEL_FEIXIN_K101_IM2BA02 tristate "Feixin K101 IM2BA02 panel" depends on OF @@ -459,6 +477,15 @@ config DRM_PANEL_NOVATEK_NT36672E LCD panel module. The panel has a resolution of 1080x2408 and uses 24 bit RGB per pixel. +config DRM_PANEL_NOVATEK_NT36672_TIANMA_JASMINE + tristate "Novatek NT36672 Tianma panel for xiaomi-jasmine" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Tianma nt36672 + command mode panel used in Xiaomi Mi A2 phone (codename jasmine) + config DRM_PANEL_NOVATEK_NT39016 tristate "Novatek NT39016 RGB/SPI panel" depends on OF && SPI @@ -902,6 +929,17 @@ config DRM_PANEL_TRULY_NT35597_WQXGA Say Y here if you want to enable support for Truly NT35597 WQXGA Dual DSI Video Mode panel +config DRM_PANEL_TRULY_TD4322 + tristate "Truly TD4322 panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for the Sony Pioneer + TD4322 1080x1920 command mode panel as found on Sony Xperia XA2 + phone. + + config DRM_PANEL_VISIONOX_R66451 tristate "Visionox R66451" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index f0203f6e02f447..e39d7317d97270 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o obj-$(CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A) += panel-boe-th101mb31ig002-28a.o +obj-$(CONFIG_DRM_PANEL_BOE_TD4320) += panel-boe-td4320.o obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o @@ -13,6 +14,7 @@ obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o obj-$(CONFIG_DRM_PANEL_EDP) += panel-edp.o obj-$(CONFIG_DRM_PANEL_EBBG_FT8719) += panel-ebbg-ft8719.o obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o +obj-$(CONFIG_DRM_PANEL_FT8716U) += panel-ft8716u.o obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o obj-$(CONFIG_DRM_PANEL_HIMAX_HX83112A) += panel-himax-hx83112a.o @@ -45,6 +47,7 @@ obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672E) += panel-novatek-nt36672e.o +obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672_TIANMA_JASMINE) += panel-novatek-nt36672-tianma-jasmine.o obj-$(CONFIG_DRM_PANEL_NOVATEK_NT39016) += panel-novatek-nt39016.o obj-$(CONFIG_DRM_PANEL_MANTIX_MLAF057WE51) += panel-mantix-mlaf057we51.o obj-$(CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO) += panel-olimex-lcd-olinuxino.o @@ -91,6 +94,7 @@ obj-$(CONFIG_DRM_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o +obj-$(CONFIG_DRM_PANEL_TRULY_TD4322) += panel-truly-td4322.o obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o obj-$(CONFIG_DRM_PANEL_VISIONOX_VTDR6130) += panel-visionox-vtdr6130.o obj-$(CONFIG_DRM_PANEL_VISIONOX_R66451) += panel-visionox-r66451.o diff --git a/drivers/gpu/drm/panel/panel-boe-td4320.c b/drivers/gpu/drm/panel/panel-boe-td4320.c new file mode 100644 index 00000000000000..74ee677fd4d2de --- /dev/null +++ b/drivers/gpu/drm/panel/panel-boe-td4320.c @@ -0,0 +1,228 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2024, Barnabas Czeman + * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree: + * Copyright (c) 2013, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include + +#include