[CIR][CodeGen] Support for _mm_prefetch

[shrikardongre]

After the new rebase had some difficulties to hard rebase locally , my apologies for that .
this is how I think i can avoid the fall over to the clflush case in clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp .

The generated CIR is

!s32i = !cir.int<s, 32>
!s8i = !cir.int<s, 8>
!void = !cir.void
#fn_attr = #cir<extra({inline = #cir.inline<no>, optnone = #cir.optnone, uwtable = #cir.uwtable<async>})>
module @"/home/shrikardongre/clangir/clang/test/CIR/CodeGen/X86/new.cc" attributes {cir.lang = #cir.lang<cxx>, cir.sob = #cir.signed_overflow_behavior<undefined>, cir.triple = "x86_64-unknown-linux-gnu", cir.type_size_info = #cir.type_size_info<char = 8, int = 32, size_t = 64>, cir.uwtable = #cir.uwtable<async>, dlti.dl_spec = #dlti.dl_spec<!llvm.ptr<270> = dense<32> : vector<4xi64>, i64 = dense<64> : vector<2xi64>, i128 = dense<128> : vector<2xi64>, !llvm.ptr<271> = dense<32> : vector<4xi64>, f80 = dense<128> : vector<2xi64>, f64 = dense<64> : vector<2xi64>, f128 = dense<128> : vector<2xi64>, !llvm.ptr<272> = dense<64> : vector<4xi64>, i16 = dense<16> : vector<2xi64>, i32 = dense<32> : vector<2xi64>, f16 = dense<16> : vector<2xi64>, !llvm.ptr = dense<64> : vector<4xi64>, i1 = dense<8> : vector<2xi64>, i8 = dense<8> : vector<2xi64>, "dlti.stack_alignment" = 128 : i64, "dlti.endianness" = "little", "dlti.mangling_mode" = "e">} {
  cir.func @main() -> !s32i extra(#fn_attr) {
    %0 = cir.alloca !s32i, !cir.ptr<!s32i>, ["__retval"] {alignment = 4 : i64} loc(#loc2)
    %1 = cir.alloca !cir.ptr<!s8i>, !cir.ptr<!cir.ptr<!s8i>>, ["p"] {alignment = 8 : i64} loc(#loc9)
    %2 = cir.load %1 : !cir.ptr<!cir.ptr<!s8i>>, !cir.ptr<!s8i> loc(#loc5)
    %3 = cir.const #cir.int<0> : !s32i loc(#loc6)
    %4 = cir.cast(bitcast, %2 : !cir.ptr<!s8i>), !cir.ptr<!void> loc(#loc7)
    %5 = cir.prefetch(%4 : !cir.ptr<!void>) locality(0) read loc(#loc7)
    %6 = cir.load %0 : !cir.ptr<!s32i>, !s32i loc(#loc2)
    cir.return %6 : !s32i loc(#loc2)
  } loc(#loc8)
} loc(#loc)
#loc = loc("/home/shrikardongre/clangir/clang/test/CIR/CodeGen/X86/new.cc":0:0)
#loc1 = loc("new.cc":1:1)
#loc2 = loc("new.cc":4:1)
#loc3 = loc("new.cc":2:5)
#loc4 = loc("new.cc":2:17)clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
#loc5 = loc("new.cc":3:18)
#loc6 = loc("new.cc":3:20)
#loc7 = loc("new.cc":3:5)
#loc8 = loc(fused[#loc1, #loc2])
#loc9 = loc(fused[#loc3, #loc4])

for the file ,

int main(){
    char const *p;
    _mm_prefetch(p,0);
}

however I had a doubt on wether
//CIR: {{%.*}}= cir.prefetch({{%.*}} : !cir.ptr<!void>) locality(0) read
in the test file is correct as if nothing is provided initially it should be write if I am not wrong, please giude
Thanks :) .

[shrikardongre]

#1522 earlier conversation .

[bcardosolopes]

Please fix the test failures

[shrikardongre]

Hello , sorry for the delay in reply I would like to highlight the doubts and errors that I am facing :

1. PrefetchOp does not return anything , so if I try to modify the CIROps.td like in this PR the existing implementation fails .

2. I tried to imitate the existing implementation of _builtin_prefetch() in the file clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp

Doubt : Why the Address hasnt been casted to a void* because ,

if we see my modified implementation above I did not cast the Address and ignoring the return part for now ,
and then i get the error :

Doubt whenever i try to change the value of second argument in the test file nothing really happens the locality changes as the value changes and the IsWrite remains on read only . So there must be a flaw in the logic that I am not able to identify .

Any help is appreciated . Trying my best to solve this with all the resources I have Thank you 😄

[bcardosolopes]

my modified implementation above I did not cast the Address

Looks like you need to add a cast

So there must be a flaw in the logic that I am not able to identify

I suggest you run the compiler under a debugger, so you can inspect values and better try to understand what's going on