Add Cortex-R support #2261
Add Cortex-R support #2261
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m-braunschweig
requested review from
nordicjm,
de-nordic and
d3zd3z
as code owners
boot/zephyr/Kconfig
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| @@ -1,6 +1,7 @@ | |||
| # Copyright (c) 2017-2020 Linaro Limited | |||
| # Copyright (c) 2020 Arm Limited | |||
| # Copyright (c) 2023 Nordic Semiconductor ASA | |||
| # Copyright (c) 2025 Siemens Mobility GmbH | |||
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don't think half a line addition gives this
| uint8_t i; | ||
| uint8_t num_regions; | ||
| uint32_t mpu_type_register; | ||
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| // disable MPU | ||
| __asm__( | ||
| " mrc p15, 0, r0, c1, c0, 0\n" | ||
| " bic r0, #1\n" | ||
| " mcr p15, 0, r0, c1, c0, 0\n" | ||
| " isb\n" | ||
| ::: "r0"); | ||
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| // the number of MPU regions is stored in bits 15:8 of the MPU type register | ||
| __asm__ volatile("mrc p15, 0, %0, c0, c0, 4\n" : "=r" (mpu_type_register) ::); | ||
| num_regions = (uint8_t) ((mpu_type_register >> 8) & BIT_MASK(8)); | ||
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| for (i = 0; i < num_regions; ++i) { | ||
| // select region in the MPU and clear the region size field | ||
| __asm__ volatile( | ||
| " mov r0, #0\n" | ||
| " mcr p15, 0, %0, c6, c2, 0\n" | ||
| " mcr p15, 0, r0, c6, c1, 2\n" | ||
| :: "r" (i) : "r0"); | ||
| } |
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should be using zephyr APIs, should not be adding code, let alone assembly, here to do this (applies to clearing MPU, the boot assembly code is fine)
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I agree that the inline assmebly isn't really good here. I was also thinking about using Zephyr functions but then noticed that arm_core_mpu_disable is not public (as in: Not in any header) and only interally used, meaning it could change.
For disabling (clearing) the individual regions Zephyr has a non-public header that provides ARM_MPU_ClrRegion (link), which is the same name CMSIS provides only for Cortex-M cores.
boot/zephyr/include/arm_cleanup.h
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| /* | |||
| * Copyright (c) 2020 Nordic Semiconductor ASA | |||
| * Copyright (c) 2025 Siemens Mobility GmbH | |||
boot/zephyr/main.c
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| __set_CONTROL(0x00); /* application will configures core on its own */ | ||
| __ISB(); | ||
| #else | ||
| /* set mode to supervisor and A, I and F bit as described in the |
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Capital first letter of comments
boot/zephyr/main.c
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| ((void (*)(void))vt->reset)(); | ||
| #else | ||
| // some architectures like the Cortex-R run in thumb mode but reset into ARM |
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use /* */ style comments
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| - Add support for cleaning up the Cortex-R core before final jumping (interrupt controller, MPU and setting the CPSR to the reset state) | |||
Add Cortex-R support by using ifdefs to change the vector table, remove CORTEX_M only code and do an explicit bx instruction to switch from Thumb to ARM mode on exit of the MCUboot application. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add code to cleanup the Cortex-R processor state to the reset configuration and disable + acknowledge all interrupts before entering the booted application. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
Add notes about the additions made in order to support Cortex-R booting. Signed-off-by: Mika Braunschweig <mika.braunschweig@siemens.com>
m-braunschweig
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Thanks for the review. I addressed the changes in the last force-push and added a comment to the MPU |
This PR adds support for Booting on a Cortex-R core. It has been tested with the following branch which also includes some instructions what Kconfig options need to be set: https://github.com/siemens/zephyr/tree/mika/ti/ti-am2434-native-boot